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Message-Id: <20230530112050.5635-3-aford173@gmail.com>
Date:   Tue, 30 May 2023 06:20:49 -0500
From:   Adam Ford <aford173@...il.com>
To:     linux-renesas-soc@...r.kernel.org
Cc:     biju.das.jz@...renesas.com, marek.vasut+renesas@...il.com,
        cstevens@...conembedded.com, aford@...conembedded.com,
        Adam Ford <aford173@...il.com>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        Magnus Damm <magnus.damm@...il.com>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org
Subject: [RFC 3/3] arm64: dts: renesas: r8a774a1: Add GPU Node

With the 3dge and ZG clocks now available, the generic GPU node can
be added.  Until proper firmware is made, it is not usable.

Signed-off-by: Adam Ford <aford173@...il.com>
---
This is based on the assumption that the Rogue 6250 could use
generic driver [1] and firmware [2] being implemebted by the Mesa group
and others.  In practice, the firmware isn't really compatible since
the 6250 in the RZ/G2M appears to be a different variant.

[1] - https://gitlab.freedesktop.org/frankbinns/powervr/-/tree/powervr-next
[2] - https://gitlab.freedesktop.org/frankbinns/linux-firmware/-/tree/powervr/powervr

diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
index c21b78685123..7e5816113a3c 100644
--- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
@@ -226,6 +226,27 @@ extalr_clk: extalr {
 		clock-frequency = <0>;
 	};
 
+	gpu_opp_table: opp-table {
+		compatible = "operating-points-v2";
+
+		opp-200000000 {
+			opp-hz = /bits/ 64 <200000000>;
+			opp-microvolt = <830000>;
+		};
+		opp-300000000 {
+			opp-hz = /bits/ 64 <300000000>;
+			opp-microvolt = <830000>;
+		};
+		opp-400000000 {
+			opp-hz = /bits/ 64 <400000000>;
+			opp-microvolt = <830000>;
+		};
+		opp-600000000 {
+			opp-hz = /bits/ 64 <600000000>;
+			opp-microvolt = <830000>;
+		};
+	};
+
 	/* External PCIe clock - can be overridden by the board */
 	pcie_bus_clk: pcie_bus {
 		compatible = "fixed-clock";
@@ -2347,6 +2368,18 @@ gic: interrupt-controller@...10000 {
 			resets = <&cpg 408>;
 		};
 
+		gpu@...00000 {
+			compatible = "img,powervr-series6xt";
+			reg = <0 0xfd000000 0 0x40000>;
+			interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 112>, <&cpg CPG_MOD 112>,<&cpg CPG_MOD 112>;
+			clock-names = "core", "mem", "sys";
+			interrupt-names = "gpu";
+			operating-points-v2 = <&gpu_opp_table>;
+			power-domains = <&sysc R8A774A1_PD_3DG_B>;
+			resets = <&cpg 112>;
+		};
+
 		pciec0: pcie@...00000 {
 			compatible = "renesas,pcie-r8a774a1",
 				     "renesas,pcie-rcar-gen3";
-- 
2.39.2

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