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Message-Id: <BCECE3BF-7A4D-43BF-8AA8-2232D974CD71@flygoat.com>
Date: Tue, 30 May 2023 12:54:49 +0100
From: Jiaxun Yang <jiaxun.yang@...goat.com>
To: "Maciej W. Rozycki" <macro@...am.me.uk>
Cc: Paul Cercueil <paul@...pouillou.net>,
"linux-mips@...r.kernel.org" <linux-mips@...r.kernel.org>,
linux-kernel@...r.kernel.org,
Thomas Bogendoerfer <tsbogend@...ha.franken.de>
Subject: Re: [PATCH 1/2] MIPS: Allow MIPS32R2 kernel to run on P5600 and M5150
> 2023年5月30日 12:07,Maciej W. Rozycki <macro@...am.me.uk> 写道:
>
> On Tue, 30 May 2023, Jiaxun Yang wrote:
>
>>>> M5150 and P5600 are two MIPS32R5 kernels, however as MIPS32R5 is
>>>> backward compatible with MIPS32R2 there is no reason to forbid
>>>> M5150 and P5600 on MIPS32R2 kernel.
>>>
>>> What problem are you trying to solve? The CONFIG_SYS_HAS_CPU_* settings
>>> denote overall platform's support for the given CPU and have nothing to do
>>> with what architecture level a given kernel has been configured for. You
>>> do need to get the settings right for your platform, just as you do in
>>> 2/2, but this 1/2 part looks wrong to me.
>>
>> Well the universal target is to allow R2 generic kernel to run on R5 CPUs.
>> As R5 is backward compatible we can just have one universal kernel binary.
>
> Sure, but this change is not needed for it. You just need to declare
> which ISA revisions your platform supports and leave `__get_cpu_type'
> alone. It has worked like that for a decade now.
I’m afraid it won’t work as you expected.
Actually I ran into a problem that `case CPU_P5600` in c-r4k.c is optimised out
by compiler, because the codepath is marked as unreachable.
Thanks
- Jiaxun
>
> Back in the day I used to run R1 kernels on R2 hardware myself. And
> maybe MIPS IV on R1 even, as we had MIPS Malta CPU modules with both MIPS
> IV devices (QED RM5261/RM7061) and MIPS64r1 devices (MIPS 5Kc/20Kc/25Kf)
> and switching the kernel when swapping modules was a nuisance. The Malta
> config still supports these devices although some may not exist anymore.
>
> Maciej
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