linux-kernel - Re: [PATCH v2 3/3] docs: perf: Add new description for HiSilicon UC PMU

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20230531170001.00005210@Huawei.com>
Date:   Wed, 31 May 2023 17:00:01 +0100
From:   Jonathan Cameron <Jonathan.Cameron@...wei.com>
To:     Junhao He <hejunhao3@...wei.com>
CC:     <will@...nel.org>, <linux-kernel@...r.kernel.org>,
        <mark.rutland@....com>, <linux-arm-kernel@...ts.infradead.org>,
        <linux-doc@...r.kernel.org>, <linuxarm@...wei.com>,
        <yangyicong@...wei.com>, <shenyang39@...wei.com>,
        <prime.zeng@...ilicon.com>
Subject: Re: [PATCH v2 3/3] docs: perf: Add new description for HiSilicon UC
 PMU

On Wed, 31 May 2023 18:46:25 +0800
Junhao He <hejunhao3@...wei.com> wrote:

> A new function is added on HiSilicon uncore UC PMU.
> 
> The UC PMU support to filter statistical information based on
> the specified tx request uring channel. Make user configuration
> through "uring_channel" parameter.
> Document them to provide guidance on how to use them.
> 
> Signed-off-by: Junhao He <hejunhao3@...wei.com>
Seems reasonable to me.
Reviewed-by: Jonathan Cameron <Jonthan.Cameron@...wei.com>

> ---
>  Documentation/admin-guide/perf/hisi-pmu.rst | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/Documentation/admin-guide/perf/hisi-pmu.rst b/Documentation/admin-guide/perf/hisi-pmu.rst
> index 546979360513..939a524fa1d6 100644
> --- a/Documentation/admin-guide/perf/hisi-pmu.rst
> +++ b/Documentation/admin-guide/perf/hisi-pmu.rst
> @@ -98,6 +98,14 @@ CCL/ICL-ID. For I/O die, the ICL-ID is followed by:
>  5'b00011: HAC_ICL;
>  5'b10000: PCIe_ICL;
>  
> +(e) uring_channel: UC PMU events 0x47~0x59 supports filtering by tx request
> +uring channel. It is 2 bits. Some important codes are as follows:
> +2'b11: count the events which sent to the uring_ext (MATA) channel;
> +2'b01: is the same as 2'b11;
> +2'b10: count the events which sent to the uring (non-MATA) channel;
> +2'b00: default value, count the events which sent to the both uring and
> +       uring_ext channel;
> +
>  Users could configure IDs to count data come from specific CCL/ICL, by setting
>  srcid_cmd & srcid_msk, and data desitined for specific CCL/ICL by setting
>  tgtid_cmd & tgtid_msk. A set bit in srcid_msk/tgtid_msk means the PMU will not