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Message-ID: <20230531083402.GF68926@ediswmail.ad.cirrus.com>
Date: Wed, 31 May 2023 08:34:02 +0000
From: Charles Keepax <ckeepax@...nsource.cirrus.com>
To: Mark Brown <broonie@...nel.org>
CC: <lee@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>,
<linus.walleij@...aro.org>, <vkoul@...nel.org>,
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<yung-chuan.liao@...ux.intel.com>, <sanyog.r.kale@...el.com>,
<pierre-louis.bossart@...ux.intel.com>,
<alsa-devel@...a-project.org>, <patches@...nsource.cirrus.com>,
<devicetree@...r.kernel.org>, <linux-gpio@...r.kernel.org>,
<linux-spi@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 5/6] spi: cs42l43: Add SPI controller support
On Tue, May 30, 2023 at 10:30:46PM +0100, Mark Brown wrote:
> On Tue, May 30, 2023 at 01:21:11PM +0100, Charles Keepax wrote:
>
> A couple of small things:
>
> > +static unsigned int cs42l43_clock_divs[16] = {
> > + 2, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30
> > +};
>
> Do we need to specify the size of the array? I just had to count the
> number of initialisers :( Should probably also be const.
>
> > + for (; buf < block - (sizeof(u32) - 1); buf += sizeof(u32))
> > + regmap_write(regmap, CS42L43_TX_DATA, *(const u32 *)buf);
>
> We're passing a byte stream through a u32 here - are you sure this is
> endian safe?
Ah shoot, yeah Andy made some comments on this that seem to have
got lost in my mass of fixups. I will fixup for a v3.
Thanks,
Charles
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