linux-kernel - RE: [PATCH net-next v5 1/1] net: dsa: mv88e6xxx: implement USXGMII mode for mv88e6393x

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Message-ID: <BYAPR14MB2918FA8456C076C05B054E0CE349A@BYAPR14MB2918.namprd14.prod.outlook.com>
Date:   Thu, 1 Jun 2023 23:17:17 +0000
From:   Michal Smulski <michal.smulski@...a.com>
To:     Russell King <linux@...linux.org.uk>,
        "msmulski2@...il.com" <msmulski2@...il.com>
CC:     "andrew@...n.ch" <andrew@...n.ch>,
        "f.fainelli@...il.com" <f.fainelli@...il.com>,
        "olteanv@...il.com" <olteanv@...il.com>,
        "davem@...emloft.net" <davem@...emloft.net>,
        "edumazet@...gle.com" <edumazet@...gle.com>,
        "kuba@...nel.org" <kuba@...nel.org>,
        "pabeni@...hat.com" <pabeni@...hat.com>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "simon.horman@...igine.com" <simon.horman@...igine.com>,
        "kabel@...nel.org" <kabel@...nel.org>
Subject: RE: [PATCH net-next v5 1/1] net: dsa: mv88e6xxx: implement USXGMII
 mode for mv88e6393x

I was not aware of phylink_decode_usxgmii_word(). I would be happy to re-do this patch and remove #defines as per your comments.

Regards,
Michal


-----Original Message-----
From: Russell King <linux@...linux.org.uk> 
Sent: Thursday, June 1, 2023 3:43 PM
To: msmulski2@...il.com
Cc: andrew@...n.ch; f.fainelli@...il.com; olteanv@...il.com; davem@...emloft.net; edumazet@...gle.com; kuba@...nel.org; pabeni@...hat.com; netdev@...r.kernel.org; linux-kernel@...r.kernel.org; simon.horman@...igine.com; kabel@...nel.org; Michal Smulski <michal.smulski@...a.com>
Subject: Re: [PATCH net-next v5 1/1] net: dsa: mv88e6xxx: implement USXGMII mode for mv88e6393x

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On Thu, Jun 01, 2023 at 02:52:51PM -0700, msmulski2@...il.com wrote:
> +/* USXGMII */
> +#define MV88E6390_USXGMII_PHY_STATUS_SPEED_MASK      GENMASK(11, 9)
> +#define MV88E6390_USXGMII_PHY_STATUS_SPEED_5000      0xa00
> +#define MV88E6390_USXGMII_PHY_STATUS_SPEED_2500      0x800
> +#define MV88E6390_USXGMII_PHY_STATUS_SPEED_10000     0x600
> +#define MV88E6390_USXGMII_PHY_STATUS_SPEED_1000      0x400
> +#define MV88E6390_USXGMII_PHY_STATUS_SPEED_100       0x200
> +#define MV88E6390_USXGMII_PHY_STATUS_SPEED_10        0x000
> +#define MV88E6390_USXGMII_PHY_STATUS_DUPLEX_FULL     BIT(12)
> +#define MV88E6390_USXGMII_PHY_STATUS_LINK            BIT(15)

How is this different from the definitions in include/uapi/linux/mdio.h
(see MDIO_USXGMII_*). Have you considered using
phylink_decode_usxgmii_word() to decode these instead of reinventing the
wheel?

It would be nice to wait until we've converted 88e6xxx to phylink PCS
before adding this support, which is something that's been blocked for
a few years but should be unblocked either at the end of this cycle,
or certainly by 6.5-rc1. Andrew, would you agree?

--
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