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Message-ID: <07c697e7-a33b-7e3e-4ef8-9e1453aa1b05@quicinc.com>
Date:   Thu, 1 Jun 2023 14:47:51 +0530
From:   Vikash Garodia <quic_vgarodia@...cinc.com>
To:     Konrad Dybcio <konrad.dybcio@...aro.org>,
        Stanimir Varbanov <stanimir.k.varbanov@...il.com>,
        Andy Gross <agross@...nel.org>,
        "Bjorn Andersson" <andersson@...nel.org>,
        Mauro Carvalho Chehab <mchehab@...nel.org>,
        Dikshita Agarwal <dikshita@....qualcomm.com>,
        Bryan O'Donoghue <bryan.odonoghue@...aro.org>,
        Mansur Alisha Shaik <mansur@...eaurora.org>,
        Jonathan Marek <jonathan@...ek.ca>,
        Hans Verkuil <hans.verkuil@...co.com>,
        Dikshita Agarwal <quic_dikshita@...cinc.com>
CC:     Mauro Carvalho Chehab <mchehab+huawei@...nel.org>,
        Stanimir Varbanov <stanimir.varbanov@...aro.org>,
        <linux-media@...r.kernel.org>, <linux-arm-msm@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>,
        "Marijn Suijten" <marijn.suijten@...ainline.org>
Subject: Re: [PATCH v4 17/17] media: venus: hfi_venus: Restrict writing
 SCIACMDARG3 to Venus V1/V2

On 5/30/2023 6:00 PM, Konrad Dybcio wrote:
> This write was last present on msm-3.10, which means before HFI3XX
> platforms were introduced. Guard it with an appropriate if condition.
> 
> Does not seem to have any adverse effects on at least SM8250.
> 
> Signed-off-by: Konrad Dybcio <konrad.dybcio@...aro.org>

Reviewed-by: Vikash Garodia <quic_vgarodia@...cinc.com>

> ---
>  drivers/media/platform/qcom/venus/hfi_venus.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/media/platform/qcom/venus/hfi_venus.c b/drivers/media/platform/qcom/venus/hfi_venus.c
> index 82854553f99e..19fc6575a489 100644
> --- a/drivers/media/platform/qcom/venus/hfi_venus.c
> +++ b/drivers/media/platform/qcom/venus/hfi_venus.c
> @@ -462,7 +462,8 @@ static int venus_boot_core(struct venus_hfi_device *hdev)
>  	}
>  
>  	writel(mask_val, wrapper_base + WRAPPER_INTR_MASK);
> -	writel(1, cpu_cs_base + CPU_CS_SCIACMDARG3);
> +	if (IS_V1(hdev->core))
> +		writel(1, cpu_cs_base + CPU_CS_SCIACMDARG3);
>  
>  	writel(BIT(VIDC_CTRL_INIT_CTRL_SHIFT), cpu_cs_base + VIDC_CTRL_INIT);
>  	while (!ctrl_status && count < max_tries) {
> 

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