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Message-ID: <1e846ba0-c8dc-5a93-538e-42457c557580@linaro.org>
Date:   Thu, 1 Jun 2023 13:11:33 +0300
From:   Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To:     Konrad Dybcio <konrad.dybcio@...aro.org>,
        Andy Gross <agross@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Georgi Djakov <djakov@...nel.org>,
        Leo Yan <leo.yan@...aro.org>, Evan Green <evgreen@...omium.org>
Cc:     Marijn Suijten <marijn.suijten@...ainline.org>,
        linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-clk@...r.kernel.org, linux-pm@...r.kernel.org
Subject: Re: [PATCH 12/20] interconnect: qcom: msm8996: Hook up RPM bus clk
 definitions

On 01/06/2023 13:10, Konrad Dybcio wrote:
> 
> 
> On 1.06.2023 12:08, Dmitry Baryshkov wrote:
>> On 30/05/2023 13:20, Konrad Dybcio wrote:
>>> Assign the necessary definitions to migrate to the new bus clock
>>> handling mechanism.
>>>
>>> Signed-off-by: Konrad Dybcio <konrad.dybcio@...aro.org>
>>> ---
>>>    drivers/interconnect/qcom/msm8996.c | 7 +++++++
>>>    1 file changed, 7 insertions(+)
>>>
>>> diff --git a/drivers/interconnect/qcom/msm8996.c b/drivers/interconnect/qcom/msm8996.c
>>> index 1f7e88a37acd..a596f4035d2e 100644
>>> --- a/drivers/interconnect/qcom/msm8996.c
>>> +++ b/drivers/interconnect/qcom/msm8996.c
>>> @@ -1840,6 +1840,7 @@ static const struct qcom_icc_desc msm8996_a1noc = {
>>>        .type = QCOM_ICC_NOC,
>>>        .nodes = a1noc_nodes,
>>>        .num_nodes = ARRAY_SIZE(a1noc_nodes),
>>> +    .bus_clk_desc = &aggre1_branch_clk,
>>>        .regmap_cfg = &msm8996_a1noc_regmap_config
>>>    };
>>>    @@ -1861,6 +1862,7 @@ static const struct qcom_icc_desc msm8996_a2noc = {
>>>        .type = QCOM_ICC_NOC,
>>>        .nodes = a2noc_nodes,
>>>        .num_nodes = ARRAY_SIZE(a2noc_nodes),
>>> +    .bus_clk_desc = &aggre2_branch_clk,
>>>        .intf_clocks = a2noc_intf_clocks,
>>>        .num_intf_clocks = ARRAY_SIZE(a2noc_intf_clocks),
>>>        .regmap_cfg = &msm8996_a2noc_regmap_config
>>> @@ -1889,6 +1891,7 @@ static const struct qcom_icc_desc msm8996_bimc = {
>>>        .type = QCOM_ICC_BIMC,
>>>        .nodes = bimc_nodes,
>>>        .num_nodes = ARRAY_SIZE(bimc_nodes),
>>> +    .bus_clk_desc = &bimc_clk,
>>>        .regmap_cfg = &msm8996_bimc_regmap_config
>>>    };
>>>    @@ -1947,6 +1950,7 @@ static const struct qcom_icc_desc msm8996_cnoc = {
>>>        .type = QCOM_ICC_NOC,
>>>        .nodes = cnoc_nodes,
>>>        .num_nodes = ARRAY_SIZE(cnoc_nodes),
>>> +    .bus_clk_desc = &bus_2_clk,
>>>        .regmap_cfg = &msm8996_cnoc_regmap_config
>>>    };
>>>    @@ -2000,6 +2004,7 @@ static const struct qcom_icc_desc msm8996_mnoc = {
>>>        .type = QCOM_ICC_NOC,
>>>        .nodes = mnoc_nodes,
>>>        .num_nodes = ARRAY_SIZE(mnoc_nodes),
>>> +    .bus_clk_desc = &mmaxi_0_clk,
>>
>> What about an ahb_clk_src here?
> This should be remodeled to MNoC (MMAXI clk) + MNoC_AHB (ahb_clk_src).
> 
> I can fix this after this series.

As long as it doesn't result in a regression.

> Konrad
>>
>>>        .intf_clocks = mm_intf_clocks,
>>>        .num_intf_clocks = ARRAY_SIZE(mm_intf_clocks),
>>>        .regmap_cfg = &msm8996_mnoc_regmap_config
>>> @@ -2038,6 +2043,7 @@ static const struct qcom_icc_desc msm8996_pnoc = {
>>>        .type = QCOM_ICC_NOC,
>>>        .nodes = pnoc_nodes,
>>>        .num_nodes = ARRAY_SIZE(pnoc_nodes),
>>> +    .bus_clk_desc = &bus_0_clk,
>>>        .regmap_cfg = &msm8996_pnoc_regmap_config
>>>    };
>>>    @@ -2082,6 +2088,7 @@ static const struct qcom_icc_desc msm8996_snoc = {
>>>        .type = QCOM_ICC_NOC,
>>>        .nodes = snoc_nodes,
>>>        .num_nodes = ARRAY_SIZE(snoc_nodes),
>>> +    .bus_clk_desc = &bus_1_clk,
>>>        .regmap_cfg = &msm8996_snoc_regmap_config
>>>    };
>>>   
>>

-- 
With best wishes
Dmitry

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