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Message-Id: <900543d4b9abc1004e6aecdb676f23e5508ae96f.1685692810.git.geert+renesas@glider.be>
Date: Fri, 2 Jun 2023 10:50:40 +0200
From: Geert Uytterhoeven <geert+renesas@...der.be>
To: Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Yoshihiro Shimoda <yoshihiro.shimoda.uh@...esas.com>,
Magnus Damm <magnus.damm@...il.com>,
Joerg Roedel <joro@...tes.org>,
Robin Murphy <robin.murphy@....com>
Cc: Tomasz Figa <tomasz.figa@...il.com>,
Sylwester Nawrocki <s.nawrocki@...sung.com>,
Will Deacon <will@...nel.org>, Arnd Bergmann <arnd@...db.de>,
Wolfram Sang <wsa+renesas@...g-engineering.com>,
Dejin Zheng <zhengdejin5@...il.com>,
Kai-Heng Feng <kai.heng.feng@...onical.com>,
Nicholas Piggin <npiggin@...il.com>,
Heiko Carstens <hca@...ux.ibm.com>,
Peter Zijlstra <peterz@...radead.org>,
Russell King <linux@...linux.org.uk>,
John Stultz <jstultz@...gle.com>,
Thomas Gleixner <tglx@...utronix.de>,
Tony Lindgren <tony@...mide.com>,
Krzysztof Kozlowski <krzk@...nel.org>,
Tero Kristo <tero.kristo@...ux.intel.com>,
Ulf Hansson <ulf.hansson@...aro.org>,
"Rafael J . Wysocki" <rafael.j.wysocki@...el.com>,
Vincent Guittot <vincent.guittot@...aro.org>,
linux-clk@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-renesas-soc@...r.kernel.org, linux-pm@...r.kernel.org,
iommu@...ts.linux.dev, linux-kernel@...r.kernel.org,
Geert Uytterhoeven <geert+renesas@...der.be>
Subject: [PATCH v3 5/7] clk: renesas: rzg2l: Convert to readl_poll_timeout_atomic()
Use readl_poll_timeout_atomic() instead of open-coding the same
operation.
As typically no retries are needed, 10 µs is a suitable timeout value.
Signed-off-by: Geert Uytterhoeven <geert+renesas@...der.be>
---
Polling measurements done on RZ/Five.
v3:
- New.
---
drivers/clk/renesas/rzg2l-cpg.c | 16 +++++-----------
1 file changed, 5 insertions(+), 11 deletions(-)
diff --git a/drivers/clk/renesas/rzg2l-cpg.c b/drivers/clk/renesas/rzg2l-cpg.c
index ca8b921c77625317..bc623515ad843cf5 100644
--- a/drivers/clk/renesas/rzg2l-cpg.c
+++ b/drivers/clk/renesas/rzg2l-cpg.c
@@ -903,9 +903,9 @@ static int rzg2l_mod_clock_endisable(struct clk_hw *hw, bool enable)
unsigned int reg = clock->off;
struct device *dev = priv->dev;
unsigned long flags;
- unsigned int i;
u32 bitmask = BIT(clock->bit);
u32 value;
+ int error;
if (!clock->off) {
dev_dbg(dev, "%pC does not support ON/OFF\n", hw->clk);
@@ -930,19 +930,13 @@ static int rzg2l_mod_clock_endisable(struct clk_hw *hw, bool enable)
if (!priv->info->has_clk_mon_regs)
return 0;
- for (i = 1000; i > 0; --i) {
- if (((readl(priv->base + CLK_MON_R(reg))) & bitmask))
- break;
- cpu_relax();
- }
-
- if (!i) {
+ error = readl_poll_timeout_atomic(priv->base + CLK_MON_R(reg), value,
+ value & bitmask, 0, 10);
+ if (error)
dev_err(dev, "Failed to enable CLK_ON %p\n",
priv->base + CLK_ON_R(reg));
- return -ETIMEDOUT;
- }
- return 0;
+ return error;
}
static int rzg2l_mod_clock_enable(struct clk_hw *hw)
--
2.34.1
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