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Date: Fri, 2 Jun 2023 11:19:11 +0200
From: Konrad Dybcio <konrad.dybcio@...aro.org>
To: Abel Vesa <abel.vesa@...aro.org>, Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 1/6] arm64: dts: qcom: sm8150: Use 2 interconnect cells
On 2.06.2023 08:20, Abel Vesa wrote:
> Use two interconnect cells in order to optionally support a path tag.
>
> Signed-off-by: Abel Vesa <abel.vesa@...aro.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@...aro.org>
Konrad
>
> Changes since v1:
> * This patch was not part of v1
>
> arch/arm64/boot/dts/qcom/sm8150.dtsi | 60 ++++++++++++++--------------
> 1 file changed, 30 insertions(+), 30 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> index 197c016aaeba..50a21062ea24 100644
> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> @@ -55,8 +55,8 @@ CPU0: cpu@0 {
> next-level-cache = <&L2_0>;
> qcom,freq-domain = <&cpufreq_hw 0>;
> operating-points-v2 = <&cpu0_opp_table>;
> - interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
> - <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
> + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&osm_l3 MASTER_OSM_L3_APPS 0 &osm_l3 SLAVE_OSM_L3 0>;
> power-domains = <&CPU_PD0>;
> power-domain-names = "psci";
> #cooling-cells = <2>;
> @@ -84,8 +84,8 @@ CPU1: cpu@100 {
> next-level-cache = <&L2_100>;
> qcom,freq-domain = <&cpufreq_hw 0>;
> operating-points-v2 = <&cpu0_opp_table>;
> - interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
> - <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
> + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&osm_l3 MASTER_OSM_L3_APPS 0 &osm_l3 SLAVE_OSM_L3 0>;
> power-domains = <&CPU_PD1>;
> power-domain-names = "psci";
> #cooling-cells = <2>;
> @@ -108,8 +108,8 @@ CPU2: cpu@200 {
> next-level-cache = <&L2_200>;
> qcom,freq-domain = <&cpufreq_hw 0>;
> operating-points-v2 = <&cpu0_opp_table>;
> - interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
> - <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
> + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&osm_l3 MASTER_OSM_L3_APPS 0 &osm_l3 SLAVE_OSM_L3 0>;
> power-domains = <&CPU_PD2>;
> power-domain-names = "psci";
> #cooling-cells = <2>;
> @@ -132,8 +132,8 @@ CPU3: cpu@300 {
> next-level-cache = <&L2_300>;
> qcom,freq-domain = <&cpufreq_hw 0>;
> operating-points-v2 = <&cpu0_opp_table>;
> - interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
> - <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
> + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&osm_l3 MASTER_OSM_L3_APPS 0 &osm_l3 SLAVE_OSM_L3 0>;
> power-domains = <&CPU_PD3>;
> power-domain-names = "psci";
> #cooling-cells = <2>;
> @@ -156,8 +156,8 @@ CPU4: cpu@400 {
> next-level-cache = <&L2_400>;
> qcom,freq-domain = <&cpufreq_hw 1>;
> operating-points-v2 = <&cpu4_opp_table>;
> - interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
> - <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
> + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&osm_l3 MASTER_OSM_L3_APPS 0 &osm_l3 SLAVE_OSM_L3 0>;
> power-domains = <&CPU_PD4>;
> power-domain-names = "psci";
> #cooling-cells = <2>;
> @@ -180,8 +180,8 @@ CPU5: cpu@500 {
> next-level-cache = <&L2_500>;
> qcom,freq-domain = <&cpufreq_hw 1>;
> operating-points-v2 = <&cpu4_opp_table>;
> - interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
> - <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
> + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&osm_l3 MASTER_OSM_L3_APPS 0 &osm_l3 SLAVE_OSM_L3 0>;
> power-domains = <&CPU_PD5>;
> power-domain-names = "psci";
> #cooling-cells = <2>;
> @@ -204,8 +204,8 @@ CPU6: cpu@600 {
> next-level-cache = <&L2_600>;
> qcom,freq-domain = <&cpufreq_hw 1>;
> operating-points-v2 = <&cpu4_opp_table>;
> - interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
> - <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
> + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&osm_l3 MASTER_OSM_L3_APPS 0 &osm_l3 SLAVE_OSM_L3 0>;
> power-domains = <&CPU_PD6>;
> power-domain-names = "psci";
> #cooling-cells = <2>;
> @@ -228,8 +228,8 @@ CPU7: cpu@700 {
> next-level-cache = <&L2_700>;
> qcom,freq-domain = <&cpufreq_hw 2>;
> operating-points-v2 = <&cpu7_opp_table>;
> - interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
> - <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
> + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&osm_l3 MASTER_OSM_L3_APPS 0 &osm_l3 SLAVE_OSM_L3 0>;
> power-domains = <&CPU_PD7>;
> power-domain-names = "psci";
> #cooling-cells = <2>;
> @@ -1760,49 +1760,49 @@ spi15: spi@...000 {
> config_noc: interconnect@...0000 {
> compatible = "qcom,sm8150-config-noc";
> reg = <0 0x01500000 0 0x7400>;
> - #interconnect-cells = <1>;
> + #interconnect-cells = <2>;
> qcom,bcm-voters = <&apps_bcm_voter>;
> };
>
> system_noc: interconnect@...0000 {
> compatible = "qcom,sm8150-system-noc";
> reg = <0 0x01620000 0 0x19400>;
> - #interconnect-cells = <1>;
> + #interconnect-cells = <2>;
> qcom,bcm-voters = <&apps_bcm_voter>;
> };
>
> mc_virt: interconnect@...a000 {
> compatible = "qcom,sm8150-mc-virt";
> reg = <0 0x0163a000 0 0x1000>;
> - #interconnect-cells = <1>;
> + #interconnect-cells = <2>;
> qcom,bcm-voters = <&apps_bcm_voter>;
> };
>
> aggre1_noc: interconnect@...0000 {
> compatible = "qcom,sm8150-aggre1-noc";
> reg = <0 0x016e0000 0 0xd080>;
> - #interconnect-cells = <1>;
> + #interconnect-cells = <2>;
> qcom,bcm-voters = <&apps_bcm_voter>;
> };
>
> aggre2_noc: interconnect@...0000 {
> compatible = "qcom,sm8150-aggre2-noc";
> reg = <0 0x01700000 0 0x20000>;
> - #interconnect-cells = <1>;
> + #interconnect-cells = <2>;
> qcom,bcm-voters = <&apps_bcm_voter>;
> };
>
> compute_noc: interconnect@...0000 {
> compatible = "qcom,sm8150-compute-noc";
> reg = <0 0x01720000 0 0x7000>;
> - #interconnect-cells = <1>;
> + #interconnect-cells = <2>;
> qcom,bcm-voters = <&apps_bcm_voter>;
> };
>
> mmss_noc: interconnect@...0000 {
> compatible = "qcom,sm8150-mmss-noc";
> reg = <0 0x01740000 0 0x1c100>;
> - #interconnect-cells = <1>;
> + #interconnect-cells = <2>;
> qcom,bcm-voters = <&apps_bcm_voter>;
> };
>
> @@ -2120,7 +2120,7 @@ crypto: crypto@...a000 {
> <&apps_smmu 0x506 0x0011>,
> <&apps_smmu 0x508 0x0011>,
> <&apps_smmu 0x512 0x0000>;
> - interconnects = <&aggre2_noc MASTER_CRYPTO_CORE_0 &mc_virt SLAVE_EBI_CH0>;
> + interconnects = <&aggre2_noc MASTER_CRYPTO_CORE_0 0 &mc_virt SLAVE_EBI_CH0 0>;
> interconnect-names = "memory";
> };
>
> @@ -3547,14 +3547,14 @@ opp-202000000 {
> dc_noc: interconnect@...0000 {
> compatible = "qcom,sm8150-dc-noc";
> reg = <0 0x09160000 0 0x3200>;
> - #interconnect-cells = <1>;
> + #interconnect-cells = <2>;
> qcom,bcm-voters = <&apps_bcm_voter>;
> };
>
> gem_noc: interconnect@...0000 {
> compatible = "qcom,sm8150-gem-noc";
> reg = <0 0x09680000 0 0x3e200>;
> - #interconnect-cells = <1>;
> + #interconnect-cells = <2>;
> qcom,bcm-voters = <&apps_bcm_voter>;
> };
>
> @@ -3659,7 +3659,7 @@ usb_2_dwc3: usb@...0000 {
> camnoc_virt: interconnect@...0000 {
> compatible = "qcom,sm8150-camnoc-virt";
> reg = <0 0x0ac00000 0 0x1000>;
> - #interconnect-cells = <1>;
> + #interconnect-cells = <2>;
> qcom,bcm-voters = <&apps_bcm_voter>;
> };
>
> @@ -3668,8 +3668,8 @@ mdss: display-subsystem@...0000 {
> reg = <0 0x0ae00000 0 0x1000>;
> reg-names = "mdss";
>
> - interconnects = <&mmss_noc MASTER_MDP_PORT0 &mc_virt SLAVE_EBI_CH0>,
> - <&mmss_noc MASTER_MDP_PORT1 &mc_virt SLAVE_EBI_CH0>;
> + interconnects = <&mmss_noc MASTER_MDP_PORT0 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&mmss_noc MASTER_MDP_PORT1 0 &mc_virt SLAVE_EBI_CH0 0>;
> interconnect-names = "mdp0-mem", "mdp1-mem";
>
> power-domains = <&dispcc MDSS_GDSC>;
> @@ -4334,7 +4334,7 @@ osm_l3: interconnect@...21000 {
> clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
> clock-names = "xo", "alternate";
>
> - #interconnect-cells = <1>;
> + #interconnect-cells = <2>;
> };
>
> cpufreq_hw: cpufreq@...23000 {
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