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Message-ID: <BYAPR14MB2918E4481E0EC7697AB1BAB3E34FA@BYAPR14MB2918.namprd14.prod.outlook.com>
Date: Sat, 3 Jun 2023 04:59:26 +0000
From: Michal Smulski <michal.smulski@...a.com>
To: Russell King <linux@...linux.org.uk>
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Subject: RE: [PATCH net-next v6 1/1] net: dsa: mv88e6xxx: implement USXGMII
mode for mv88e6393x
I do not know if there is a an_complete bit as per my previous email. I think for now I will set state->an_complete = state->link.
Michal
-----Original Message-----
From: Russell King <linux@...linux.org.uk>
Sent: Friday, June 2, 2023 4:08 AM
To: msmulski2@...il.com
Cc: andrew@...n.ch; f.fainelli@...il.com; olteanv@...il.com; davem@...emloft.net; edumazet@...gle.com; kuba@...nel.org; pabeni@...hat.com; netdev@...r.kernel.org; linux-kernel@...r.kernel.org; simon.horman@...igine.com; kabel@...nel.org; Michal Smulski <michal.smulski@...a.com>
Subject: Re: [PATCH net-next v6 1/1] net: dsa: mv88e6xxx: implement USXGMII mode for mv88e6393x
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On Thu, Jun 01, 2023 at 05:17:04PM -0700, msmulski2@...il.com wrote:
> +static int mv88e639x_serdes_pcs_get_state_usxgmii(struct mv88e6xxx_chip *chip,
> + int port, int lane,
> + struct
> +phylink_link_state *state) {
> + u16 status, lp_status;
> + int err;
> +
> + err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS,
> + MV88E6390_USXGMII_PHY_STATUS, &status);
> + if (err) {
> + dev_err(chip->dev, "can't read Serdes USXGMII PHY status: %d\n", err);
> + return err;
> + }
> + dev_dbg(chip->dev, "USXGMII PHY status: 0x%x\n", status);
> +
> + state->link = !!(status & MDIO_USXGMII_LINK);
Another thing which is missing is filling in state->an_complete. Does the PHY have a status bit for this when operating in USXGMII mode?
If not, please set it to state->link.
Thanks.
--
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