lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <ZH2yr1sFvjbAiBTq@shikoro>
Date:   Mon, 5 Jun 2023 12:02:23 +0200
From:   Wolfram Sang <wsa@...nel.org>
To:     Jarkko Nikula <jarkko.nikula@...ux.intel.com>
Cc:     David Zheng <david.zheng@...el.com>, linux-i2c@...r.kernel.org,
        linux-kernel@...r.kernel.org, andriy.shevchenko@...ux.intel.com,
        mika.westerberg@...ux.intel.com, jsd@...ihalf.com
Subject: Re: [PATCH v3] i2c: designware: fix idx_write_cnt in read loop

On Fri, May 26, 2023 at 04:58:26PM +0300, Jarkko Nikula wrote:
> On 5/24/23 21:14, David Zheng wrote:
> > With IC_INTR_RX_FULL slave interrupt handler reads data in a loop until
> > RX FIFO is empty. When testing with the slave-eeprom, each transaction
> > has 2 bytes for address/index and 1 byte for value, the address byte
> > can be written as data byte due to dropping STOP condition.
> > 
> > In the test below, the master continuously writes to the slave, first 2
> > bytes are index, 3rd byte is value and follow by a STOP condition.
> > 
> >   i2c_write: i2c-3 #0 a=04b f=0000 l=3 [00-D1-D1]
> >   i2c_write: i2c-3 #0 a=04b f=0000 l=3 [00-D2-D2]
> >   i2c_write: i2c-3 #0 a=04b f=0000 l=3 [00-D3-D3]
> > 
> > Upon receiving STOP condition slave eeprom would reset `idx_write_cnt` so
> > next 2 bytes can be treated as buffer index for upcoming transaction.
> > Supposedly the slave eeprom buffer would be written as
> > 
> >   EEPROM[0x00D1] = 0xD1
> >   EEPROM[0x00D2] = 0xD2
> >   EEPROM[0x00D3] = 0xD3
> > 
> > When CPU load is high the slave irq handler may not read fast enough,
> > the interrupt status can be seen as 0x204 with both DW_IC_INTR_STOP_DET
> > (0x200) and DW_IC_INTR_RX_FULL (0x4) bits. The slave device may see
> > the transactions below.
> > 
> >   0x1 STATUS SLAVE_ACTIVITY=0x1 : RAW_INTR_STAT=0x1594 : INTR_STAT=0x4
> >   0x1 STATUS SLAVE_ACTIVITY=0x1 : RAW_INTR_STAT=0x1594 : INTR_STAT=0x4
> >   0x1 STATUS SLAVE_ACTIVITY=0x1 : RAW_INTR_STAT=0x1594 : INTR_STAT=0x4
> >   0x1 STATUS SLAVE_ACTIVITY=0x1 : RAW_INTR_STAT=0x1794 : INTR_STAT=0x204
> >   0x1 STATUS SLAVE_ACTIVITY=0x0 : RAW_INTR_STAT=0x1790 : INTR_STAT=0x200
> >   0x1 STATUS SLAVE_ACTIVITY=0x1 : RAW_INTR_STAT=0x1594 : INTR_STAT=0x4
> >   0x1 STATUS SLAVE_ACTIVITY=0x1 : RAW_INTR_STAT=0x1594 : INTR_STAT=0x4
> >   0x1 STATUS SLAVE_ACTIVITY=0x1 : RAW_INTR_STAT=0x1594 : INTR_STAT=0x4
> > 
> > After `D1` is received, read loop continues to read `00` which is the
> > first bype of next index. Since STOP condition is ignored by the loop,
> > eeprom buffer index increased to `D2` and `00` is written as value.
> > 
> > So the slave eeprom buffer becomes
> > 
> >   EEPROM[0x00D1] = 0xD1
> >   EEPROM[0x00D2] = 0x00
> >   EEPROM[0x00D3] = 0xD3
> > 
> > The fix is to use `FIRST_DATA_BYTE` (bit 11) in `IC_DATA_CMD` to split
> > the transactions. The first index byte in this case would have bit 11
> > set. Check this indication to inject I2C_SLAVE_WRITE_REQUESTED event
> > which will reset `idx_write_cnt` in slave eeprom.
> > 
> > Signed-off-by: David Zheng <david.zheng@...el.com>

Applied to for-current, thanks!

Someone maybe has a Fixes tag for it?


Download attachment "signature.asc" of type "application/pgp-signature" (834 bytes)

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ