linux-kernel - Re: [PATCH v4] mmc: mtk-sd: reduce CIT for better performance

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Date:   Tue, 6 Jun 2023 07:57:21 +0000
From:   Wenbin Mei (梅文彬) 
        <Wenbin.Mei@...iatek.com>
To:     "ulf.hansson@...aro.org" <ulf.hansson@...aro.org>,
        "angelogioacchino.delregno@...labora.com" 
        <angelogioacchino.delregno@...labora.com>
CC:     "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-mediatek@...ts.infradead.org" 
        <linux-mediatek@...ts.infradead.org>,
        "asutoshd@...eaurora.org" <asutoshd@...eaurora.org>,
        "linux-mmc@...r.kernel.org" <linux-mmc@...r.kernel.org>,
        "riteshh@...eaurora.org" <riteshh@...eaurora.org>,
        Chaotian Jing (井朝天) 
        <Chaotian.Jing@...iatek.com>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "matthias.bgg@...il.com" <matthias.bgg@...il.com>,
        "adrian.hunter@...el.com" <adrian.hunter@...el.com>
Subject: Re: [PATCH v4] mmc: mtk-sd: reduce CIT for better performance

On Tue, 2023-06-06 at 09:46 +0200, AngeloGioacchino Del Regno wrote:
>  	 
> External email : Please do not click links or open attachments until
> you have verified the sender or the content.
>  Il 05/06/23 14:14, Wenbin Mei ha scritto:
> > CQHCI_SSC1 indicates to CQE the polling period to use when using
> periodic
> > SEND_QUEUE_STATUS(CMD13) polling.
> > Since MSDC CQE uses msdc_hclk as ITCFVAL, so driver should use hclk
> > frequency to get the actual time.
> > The default value 0x1000 that corresponds to 150us for MediaTek
> SoCs, let's
> > decrease it to 0x40 that corresponds to 2.35us, which can improve
> the
> > performance of some eMMC devices.
> > 
> > Signed-off-by: Wenbin Mei <wenbin.mei@...iatek.com>
> > ---
> >   drivers/mmc/host/cqhci.h  |  1 +
> >   drivers/mmc/host/mtk-sd.c | 45
> +++++++++++++++++++++++++++++++++++++++
> >   2 files changed, 46 insertions(+)
> > 
> > diff --git a/drivers/mmc/host/cqhci.h b/drivers/mmc/host/cqhci.h
> > index ba9387ed90eb..292b89ebd978 100644
> > --- a/drivers/mmc/host/cqhci.h
> > +++ b/drivers/mmc/host/cqhci.h
> > @@ -23,6 +23,7 @@
> >   /* capabilities */
> >   #define CQHCI_CAP0x04
> >   #define CQHCI_CAP_CS0x10000000 /* Crypto Support */
> > +#define CQHCI_CAP_ITCFMUL(x)(((x) & GENMASK(15, 12)) >> 12)
> >   
> >   /* configuration */
> >   #define CQHCI_CFG0x08
> > diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c
> > index edade0e54a0c..9f540973caff 100644
> > --- a/drivers/mmc/host/mtk-sd.c
> > +++ b/drivers/mmc/host/mtk-sd.c
> > @@ -473,6 +473,7 @@ struct msdc_host {
> >   struct msdc_tune_para def_tune_para; /* default tune setting */
> >   struct msdc_tune_para saved_tune_para; /* tune result of
> CMD21/CMD19 */
> >   struct cqhci_host *cq_host;
> > +u32 cq_ssc1_time;
> >   };
> >   
> >   static const struct mtk_mmc_compatible mt2701_compat = {
> > @@ -2450,9 +2451,48 @@ static void
> msdc_hs400_enhanced_strobe(struct mmc_host *mmc,
> >   }
> >   }
> >   
> > +static void msdc_cqe_cit_cal(struct msdc_host *host, u64 timer_ns)
> > +{
> > +struct mmc_host *mmc = mmc_from_priv(host);
> > +struct cqhci_host *cq_host = mmc->cqe_private;
> > +u8 itcfmul;
> > +u64 hclk_freq;
> > +u64 value;
> > +
> > +/* Since MSDC CQE uses msdc_hclk as ITCFVAL, so driver should use
> hclk
> > + * frequency to get the actual time for CIT.
> > + */
> 
> 
>      /*
>       * On MediaTek SoCs the MSDC controller's CQE uses msdc_hclk as
> ITCFVAL
>       * so we multiply/divide the HCLK frequency by ITCFMUL to
> calculate the
>       * Send Status Command Idle Timer (CIT) value.
>       */
> 
> The proposed comment increases readability.
> 
Thanks for your review.
I will change it in the next version.

Begards,
Wenbin
> Cheers,
> Angelo