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Message-ID: <CAMuHMdV3gn8g-gKam71K=WfT3CVNwvz5eKPSh2Fqi3wVg7ZwNw@mail.gmail.com>
Date:   Wed, 7 Jun 2023 11:16:26 +0200
From:   Geert Uytterhoeven <geert@...ux-m68k.org>
To:     Artur Rojek <contact@...ur-rojek.eu>
Cc:     Yoshinori Sato <ysato@...rs.sourceforge.jp>,
        Rich Felker <dalias@...c.org>,
        John Paul Adrian Glaubitz <glaubitz@...sik.fu-berlin.de>,
        Rafael Ignacio Zurita <rafaelignacio.zurita@...il.com>,
        linux-sh@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 3/3] sh: dma: Correct the number of DMA channels in SH7709

Hi Artur,

On Sat, May 27, 2023 at 6:45 PM Artur Rojek <contact@...ur-rojek.eu> wrote:
> According to the hardware manual [1], the DMAC found in SH7709 features
> only 4 channels.
>
> While at it, also sort the existing targets and clarify that
> NR_ONCHIP_DMA_CHANNELS must be a multiply of two.
>
> [1] https://www.renesas.com/us/en/document/mah/sh7709s-group-hardware-manual (p. 373)
>
> Signed-off-by: Artur Rojek <contact@...ur-rojek.eu>
> ---
>
> v2: - sort existing targets

Thanks for the update!

>     - clarify that the value must be a multiply of two

That's only true when there are two DMACs, right?

Even in that case, you could mitigate that by avoiding the division by

    #ifdef SH_DMAC_BASE1
   -#define        SH_DMAC_NR_MD_CH        (CONFIG_NR_ONCHIP_DMA_CHANNELS / 2)
   +#define        SH_DMAC_NR_MD_CH        6
    #else
    #define        SH_DMAC_NR_MD_CH        CONFIG_NR_ONCHIP_DMA_CHANNELS
    #endif

That is actually safer, as the user can override NR_ONCHIP_DMA_CHANNELS
when configuring his kernel, thus breaking DMA  due to an incorrect
value of SH_DMAC_NR_MD_CH.

Unfortunately we cannot protect against that when using a single DMAC,
as SH_DMAC_NR_MD_CH can be either 4, 6, or 8.

Perhaps this configuration should be moved from Kconfig to <cpu/dma.h>,
to protect against a user overriding this value?

> --- a/arch/sh/drivers/dma/Kconfig
> +++ b/arch/sh/drivers/dma/Kconfig
> @@ -28,17 +28,19 @@ config SH_DMA_API
>  config NR_ONCHIP_DMA_CHANNELS
>         int
>         depends on SH_DMA
> -       default "4" if CPU_SUBTYPE_SH7750  || CPU_SUBTYPE_SH7751  || \
> -                      CPU_SUBTYPE_SH7750S || CPU_SUBTYPE_SH7091
> +       default "4" if CPU_SUBTYPE_SH7709 || CPU_SUBTYPE_SH7750  || \
> +                      CPU_SUBTYPE_SH7750S || CPU_SUBTYPE_SH7751 || \
> +                      CPU_SUBTYPE_SH7091
>         default "8" if CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R || \
>                        CPU_SUBTYPE_SH7760
> -       default "12" if CPU_SUBTYPE_SH7723 || CPU_SUBTYPE_SH7780  || \
> -                       CPU_SUBTYPE_SH7785 || CPU_SUBTYPE_SH7724
> +       default "12" if CPU_SUBTYPE_SH7723 || CPU_SUBTYPE_SH7724  || \
> +                       CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785
>         default "6"
>         help
>           This allows you to specify the number of channels that the on-chip
> -         DMAC supports. This will be 4 for SH7750/SH7751/Sh7750S/SH7091 and 8 for the
> -         SH7750R/SH7751R/SH7760, 12 for the SH7723/SH7780/SH7785/SH7724, default is 6.
> +         DMAC supports. This will be 4 for SH7709/SH7750/SH7750S/SH7751/SH7091,
> +         8 for SH7750R/SH7751R/SH7760, and 12 for SH7723/SH7724/SH7780/SH7785.
> +         Default is 6. Must be an even number.

Gr{oetje,eeting}s,

                        Geert


--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds