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Message-ID: <7cce1d72-6b4d-9fff-32bc-942193388134@linaro.org>
Date: Wed, 7 Jun 2023 14:04:26 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Stanley Chang <stanley_chang@...ltek.com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>
Cc: Vinod Koul <vkoul@...nel.org>,
Kishon Vijay Abraham I <kishon@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Alan Stern <stern@...land.harvard.edu>,
Ray Chi <raychi@...gle.com>,
Matthias Kaehlcke <mka@...omium.org>,
Douglas Anderson <dianders@...omium.org>,
Michael Grzeschik <m.grzeschik@...gutronix.de>,
Mathias Nyman <mathias.nyman@...ux.intel.com>,
Flavio Suligoi <f.suligoi@...m.it>,
linux-phy@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-usb@...r.kernel.org
Subject: Re: [PATCH v3 4/5] dt-bindings: phy: realtek: Add the doc about the
Realtek SoC USB 2.0 PHY
On 07/06/2023 08:24, Stanley Chang wrote:
> Add the documentation explain the property about Realtek USB PHY driver.
>
> Realtek DHC (digital home center) RTD SoCs support DWC3 XHCI USB
> controller. Added the driver to drive the USB 2.0 PHY transceivers.
>
> Signed-off-by: Stanley Chang <stanley_chang@...ltek.com>
> ---
> v2 to v3 change:
> 1. Broken down into two patches, one for each of USB 2 & 3.
> 2. Add more description about Realtek RTD SoCs architecture.
> 3. Removed parameter v1 support for simplification.
> 4. Revised the compatible name for fallback compatible.
> 5. Remove some properties that can be set in the driver.
> v1 to v2 change:
> Add phy-cells for generic phy driver
> ---
> .../bindings/phy/realtek,usb2phy.yaml | 213 ++++++++++++++++++
> 1 file changed, 213 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/phy/realtek,usb2phy.yaml
>
> diff --git a/Documentation/devicetree/bindings/phy/realtek,usb2phy.yaml b/Documentation/devicetree/bindings/phy/realtek,usb2phy.yaml
> new file mode 100644
> index 000000000000..69911e20a561
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/realtek,usb2phy.yaml
> @@ -0,0 +1,213 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +# Copyright 2023 Realtek Semiconductor Corporation
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/phy/realtek,usb2phy.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Realtek DHC SoCs USB 2.0 PHY
> +
> +maintainers:
> + - Stanley Chang <stanley_chang@...ltek.com>
> +
> +description:
> + Realtek USB 2.0 PHY support the digital home center (DHC) RTD series SoCs.
> + The USB 2.0 PHY driver is designed to support the XHCI controller. The SoCs
> + support multiple XHCI controllers. One PHY device node maps to one XHCI
> + controller.
> +
> + RTD1295/RTD1619 SoCs USB
> + The USB architecture includes three XHCI controllers.
> + Each XHCI maps to one USB 2.0 PHY and map one USB 3.0 PHY on some
> + controllers.
> + XHCI controller#0 -- usb2phy -- phy#0
> + |- usb3phy -- phy#0
> + XHCI controller#1 -- usb2phy -- phy#0
> + XHCI controller#2 -- usb2phy -- phy#0
> + |- usb3phy -- phy#0
> +
> + RTD1395 SoCs USB
> + The USB architecture includes two XHCI controllers.
> + The controller#0 has one USB 2.0 PHY. The controller#1 includes two USB 2.0
> + PHY.
> + XHCI controller#0 -- usb2phy -- phy#0
> + XHCI controller#1 -- usb2phy -- phy#0
> + |- phy#1
> +
> + RTD1319/RTD1619b SoCs USB
> + The USB architecture includes three XHCI controllers.
> + Each XHCI maps to one USB 2.0 PHY and map one USB 3.0 PHY on controllers#2.
> + XHCI controller#0 -- usb2phy -- phy#0
> + XHCI controller#1 -- usb2phy -- phy#0
> + XHCI controller#2 -- usb2phy -- phy#0
> + |- usb3phy -- phy#0
> +
> + RTD1319d SoCs USB
> + The USB architecture includes three XHCI controllers.
> + Each xhci maps to one USB 2.0 PHY and map one USB 3.0 PHY on controllers#0.
> + XHCI controller#0 -- usb2phy -- phy#0
> + |- usb3phy -- phy#0
> + XHCI controller#1 -- usb2phy -- phy#0
> + XHCI controller#2 -- usb2phy -- phy#0
> +
> + RTD1312c/RTD1315e SoCs USB
> + The USB architecture includes three XHCI controllers.
> + Each XHCI maps to one USB 2.0 PHY.
> + XHCI controller#0 -- usb2phy -- phy#0
> + XHCI controller#1 -- usb2phy -- phy#0
> + XHCI controller#2 -- usb2phy -- phy#0
> +
> +properties:
> + compatible:
> + items:
> + - enum:
> + - realtek,rtd1295-usb2phy
> + - realtek,rtd1395-usb2phy
> + - realtek,rtd1619-usb2phy
> + - realtek,rtd1319-usb2phy
> + - realtek,rtd1619b-usb2phy
> + - realtek,rtd1312c-usb2phy
> + - realtek,rtd1319d-usb2phy
> + - realtek,rtd1315e-usb2phy
Keep entries ordered alphabetically.
> + - const: realtek,usb2phy
> +
> + reg:
> + items:
> + - description: PHY data registers
> + - description: PHY control registers
> +
> + "#address-cells":
> + const: 1
> +
> + "#size-cells":
> + const: 0
> +
> + "#phy-cells":
> + const: 0
> +
> + realtek,usb-ctrl:
> + description: The phandle of syscon used to control USB PHY power domain.
> + $ref: /schemas/types.yaml#/definitions/phandle
No, we have power-domains for this.
> +
> +patternProperties:
> + "^phy@[0-3]+$":
> + type: object
> + description:
> + Each sub-node is a PHY device for one XHCI controller.
I don't think it is true. You claim above that you have 0 as phy-cells,
means you have one phy. Here you say you can have up to 4 phys.
> + For most Relatek SoCs, one XHCI controller only support one the USB 2.0
> + phy. For RTD1395 SoC, the one XHCI controller has two USB 2.0 PHYs.
> + properties:
> + realtek,page0-param:
> + description: PHY parameter at page 0. The data are the pair of the
> + offset and value.
This needs to be specific. What the heck is "PHY parameter"?
> + $ref: /schemas/types.yaml#/definitions/uint32-array
Array? Then maxItems.
> +
> + realtek,page1-param:
> + description: PHY parameter at page 1. The data are the pair of the
> + offset and value.
> + $ref: /schemas/types.yaml#/definitions/uint32-array
> +
> + realtek,page2-param:
> + description: PHY parameter at page 2. The data are the pair of the
> + offset and value. If the PHY support the page 2 parameter.
> + $ref: /schemas/types.yaml#/definitions/uint32-array
> +
> + realtek,support-page2-param:
> + description: Set this flag if PHY support page 2 parameter.
Why this cannot be deducted from compatible?
> + type: boolean
> +
> + realtek,do-toggle:
> + description: Set this flag to enable PHY parameter toggle when port
> + status change.
Do not instruct OS what to do. Explain why this is a hardware
characteristic.
> + type: boolean
> +
> + realtek,do-toggle-driving:
> + description: Set this flag to enable PHY parameter toggle for adjust
> + the driving when port status change.
Do not instruct OS what to do. Explain why this is a hardware
characteristic.
> + type: boolean
> +
> + realtek,check-efuse:
> + description: Enable to update PHY parameter from reading otp table.
Do not instruct OS what to do. Explain why this is a hardware
characteristic.
> + type: boolean
> +
> + realtek,use-default-parameter:
> + description: Don't set parameter and use default value in hardware.
NAK, you are just making things up.
> + type: boolean
> +
> + realtek,is-double-sensitivity-mode:
> + description: Set this flag to enable double sensitivity mode.
All your descriptions copy the name of property. You basically say
nothing more. I already mentioned this before. Don't ignore the
feedback, but address it.
> + type: boolean
> +
> + realtek,ldo-force-enable:
> + description: Set this flag to force enable ldo mode.
Drop everywhere "Set this flag to", because it is redundant. Now compare
what is left with property name.
Property name: realtek,ldo-force-enable
Your description: "force enable ldo mode"
How is this helpful to anybody?
Best regards,
Krzysztof
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