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Message-ID: <5b5ccfb9-d6ea-9f22-bc8f-c048da726cc9@linaro.org>
Date: Thu, 8 Jun 2023 11:27:46 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Billy Tsai <billy_tsai@...eedtech.com>,
"jdelvare@...e.com" <jdelvare@...e.com>,
"linux@...ck-us.net" <linux@...ck-us.net>,
"robh+dt@...nel.org" <robh+dt@...nel.org>,
"krzysztof.kozlowski+dt@...aro.org"
<krzysztof.kozlowski+dt@...aro.org>,
"joel@....id.au" <joel@....id.au>,
"andrew@...id.au" <andrew@...id.au>,
"thierry.reding@...il.com" <thierry.reding@...il.com>,
"u.kleine-koenig@...gutronix.de" <u.kleine-koenig@...gutronix.de>,
"corbet@....net" <corbet@....net>,
"p.zabel@...gutronix.de" <p.zabel@...gutronix.de>,
"linux-hwmon@...r.kernel.org" <linux-hwmon@...r.kernel.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-aspeed@...ts.ozlabs.org" <linux-aspeed@...ts.ozlabs.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-pwm@...r.kernel.org" <linux-pwm@...r.kernel.org>,
"linux-doc@...r.kernel.org" <linux-doc@...r.kernel.org>,
"patrick@...cx.xyz" <patrick@...cx.xyz>
Subject: Re: [v6 1/4] dt-bindings: pwm: Add ASPEED PWM Control documentation
On 08/06/2023 11:15, Billy Tsai wrote:
> On 08/06/2023 10:21, Billy Tsai wrote:
> >> On 08/06/2023 09:47, Billy Tsai wrote:
> >> >>
> >> >> >> +
> >> >> >> +allOf:
> >> >> >> + - $ref: pwm.yaml#
> >> >> >> +
> >> >> >> +properties:
> >> >> >> + compatible:
> >> >> >> + enum:
> >> >> >> + - aspeed,ast2600-pwm
> >> >> >> +
> >> >> >> + "#pwm-cells":
> >> >> >> + const: 3
> >> >>
> >> >> > 3 cells? For one PWM? What are they?
> >> >>
> >> >> channel, period and polarity.
> >>
> >> > Don't cut my responses. You wrote you have one PWM output, so only one
> >> > channel. What do you put then in the channel?
> >>
> >> You need to put 0 in the cell of the channel, the example of the dts usage will like following:
> >>
> >> pwm0: pwm0@...10000 {
> >> compatible = "aspeed,ast2600-pwm";
> >> reg = <0x1e610000 0x8>;
> >> #pwm-cells = <3>;
> >> #address-cells = <1>;
> >> #size-cells = <0>;
> >> pinctrl-names = "default";
> >> pinctrl-0 = <&pinctrl_pwm0_default>;
> >> clocks = <&syscon ASPEED_CLK_AHB>;
> >> resets = <&syscon ASPEED_RESET_PWM>;
> >> status = "okay";
> >> };
> >>
> >> pwm1: pwm1@...10010 {
> >> compatible = "aspeed,ast2600-pwm";
> >> reg = <0x1e610010 0x8>;
> >> #pwm-cells = <3>;
> >> #address-cells = <1>;
> >> #size-cells = <0>;
> >> pinctrl-names = "default";
> >> pinctrl-0 = <&pinctrl_pwm1_default>;
> >> clocks = <&syscon ASPEED_CLK_AHB>;
> >> resets = <&syscon ASPEED_RESET_PWM>;
> >> status = "okay";
>
> > BTW, these are not two PWM devices but one. I don't understand why you
> > changed previous design into something like this, but this is not
> > representing your hardware.
>
> The previous design of my patch treated our PWM controller as having 16 PWM channels.
> However, from a hardware perspective, it consists of 16 individual PWM chips, each
> with its own set of two 4-byte control registers. These chips operate independently
> and are not affected by each other.
They are affected by each other - you use the same clock and reset line.
I really doubt you have 16 PWM controllers. Anyway, I cannot judge.
Either your previous submissions were totally bogus or this one is.
Best regards,
Krzysztof
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