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Date:   Thu, 8 Jun 2023 21:30:24 +0530
From:   Manivannan Sadhasivam <mani@...nel.org>
To:     Krishna chaitanya chundru <quic_krichai@...cinc.com>
Cc:     manivannan.sadhasivam@...aro.org, quic_vbadigan@...cinc.com,
        quic_ramkri@...cinc.com, Andy Gross <agross@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konrad.dybcio@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>,
        "open list:ARM/QUALCOMM SUPPORT" <linux-arm-msm@...r.kernel.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>,
        open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 2/3] arm: dts: qcom: sdx55: Add interconnect path

On Wed, Jun 07, 2023 at 09:48:06PM +0530, Krishna chaitanya chundru wrote:
> Add pcie-mem interconnect path to sdx55 target.
> 
> Signed-off-by: Krishna chaitanya chundru <quic_krichai@...cinc.com>

Reviewed-by: Manivannan Sadhasivam <mani@...nel.org>

- Mani

> ---
>  arch/arm/boot/dts/qcom-sdx55.dtsi | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom-sdx55.dtsi
> index 342c3d1..e9f8bfe 100644
> --- a/arch/arm/boot/dts/qcom-sdx55.dtsi
> +++ b/arch/arm/boot/dts/qcom-sdx55.dtsi
> @@ -421,6 +421,10 @@
>  				     <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
>  			interrupt-names = "global",
>  					  "doorbell";
> +
> +			interconnects = <&system_noc MASTER_PCIE_0 0 &mc_virt SLAVE_EBI1 0>;
> +			interconnect-names = "pci-mem";
> +
>  			resets = <&gcc GCC_PCIE_BCR>;
>  			reset-names = "core";
>  			power-domains = <&gcc PCIE_GDSC>;
> -- 
> 2.7.4
> 

-- 
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