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Message-ID: <CAL_Jsq+5oZdHi6B-R1YUEwSOc8x8Vd9sHt1bgp5ydM_hAQJE3w@mail.gmail.com>
Date:   Fri, 9 Jun 2023 08:34:31 -0600
From:   Rob Herring <robh+dt@...nel.org>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Cc:     Conor Dooley <conor@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Palmer Dabbelt <palmer@...belt.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        linux-riscv@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH] dt-bindings: riscv: cpus: drop unneeded quotes

On Fri, Jun 9, 2023 at 8:07 AM Krzysztof Kozlowski
<krzysztof.kozlowski@...aro.org> wrote:
>
> Cleanup bindings dropping unneeded quotes. Once all these are fixed,
> checking for this can be enabled in yamllint.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
> ---
>  Documentation/devicetree/bindings/riscv/cpus.yaml | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)

Note that I already have the whole tree done. Just not all split up.

Acked-by: Rob Herring <robh@...nel.org>

>
> diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml
> index db5253a2a74a..8a56473cdd5a 100644
> --- a/Documentation/devicetree/bindings/riscv/cpus.yaml
> +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml
> @@ -61,7 +61,7 @@ properties:
>        hart.  These values originate from the RISC-V Privileged
>        Specification document, available from
>        https://riscv.org/specifications/
> -    $ref: "/schemas/types.yaml#/definitions/string"
> +    $ref: /schemas/types.yaml#/definitions/string
>      enum:
>        - riscv,sv32
>        - riscv,sv39
> @@ -95,7 +95,7 @@ properties:
>        While the isa strings in ISA specification are case
>        insensitive, letters in the riscv,isa string must be all
>        lowercase.
> -    $ref: "/schemas/types.yaml#/definitions/string"
> +    $ref: /schemas/types.yaml#/definitions/string
>      pattern: ^rv(?:64|32)imaf?d?q?c?b?k?j?p?v?h?(?:[hsxz](?:[a-z])+)?(?:_[hsxz](?:[a-z])+)*$
>
>    # RISC-V requires 'timebase-frequency' in /cpus, so disallow it here
> @@ -120,7 +120,7 @@ properties:
>        - interrupt-controller
>
>    cpu-idle-states:
> -    $ref: '/schemas/types.yaml#/definitions/phandle-array'
> +    $ref: /schemas/types.yaml#/definitions/phandle-array
>      items:
>        maxItems: 1
>      description: |
> --
> 2.34.1
>

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