lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Thu, 8 Jun 2023 22:35:02 -0700
From:   Ian Rogers <irogers@...gle.com>
To:     Ravi Bangoria <ravi.bangoria@....com>
Cc:     Suzuki K Poulose <suzuki.poulose@....com>,
        Mike Leach <mike.leach@...aro.org>,
        Leo Yan <leo.yan@...aro.org>,
        John Garry <john.g.garry@...cle.com>,
        Will Deacon <will@...nel.org>,
        James Clark <james.clark@....com>,
        Peter Zijlstra <peterz@...radead.org>,
        Ingo Molnar <mingo@...hat.com>,
        Arnaldo Carvalho de Melo <acme@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
        Jiri Olsa <jolsa@...nel.org>,
        Namhyung Kim <namhyung@...nel.org>,
        Adrian Hunter <adrian.hunter@...el.com>,
        Kajol Jain <kjain@...ux.ibm.com>,
        Jing Zhang <renyu.zj@...ux.alibaba.com>,
        Kan Liang <kan.liang@...ux.intel.com>,
        Zhengjun Xing <zhengjun.xing@...ux.intel.com>,
        Madhavan Srinivasan <maddy@...ux.ibm.com>,
        Athira Rajeev <atrajeev@...ux.vnet.ibm.com>,
        Ming Wang <wangming01@...ngson.cn>,
        Huacai Chen <chenhuacai@...nel.org>,
        Sandipan Das <sandipan.das@....com>,
        Dmitrii Dolgov <9erthalion6@...il.com>,
        Sean Christopherson <seanjc@...gle.com>,
        Ali Saidi <alisaidi@...zon.com>, Rob Herring <robh@...nel.org>,
        Thomas Richter <tmricht@...ux.ibm.com>,
        Kang Minchul <tegongkang@...il.com>,
        linux-kernel@...r.kernel.org, coresight@...ts.linaro.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-perf-users@...r.kernel.org
Subject: Re: [PATCH v5 28/34] perf pmus: Split pmus list into core and other

On Thu, Jun 8, 2023 at 10:30 PM Ravi Bangoria <ravi.bangoria@....com> wrote:
>
> On 09-Jun-23 10:10 AM, Ian Rogers wrote:
> > On Thu, Jun 8, 2023 at 9:01 PM Ravi Bangoria <ravi.bangoria@....com> wrote:
> >>
> >> Hi Ian,
> >
> > Hi Ravi,
> >
> >> On 27-May-23 12:52 PM, Ian Rogers wrote:
> >>> Split the pmus list into core and other. This will later allow for
> >>> the core and other pmus to be populated separately.
> >>>
> >>> Signed-off-by: Ian Rogers <irogers@...gle.com>
> >>> Reviewed-by: Kan Liang <kan.liang@...ux.intel.com>
> >>> ---
> >>>  tools/perf/util/pmus.c | 52 ++++++++++++++++++++++++++++++------------
> >>>  1 file changed, 38 insertions(+), 14 deletions(-)
> >>>
> >>> diff --git a/tools/perf/util/pmus.c b/tools/perf/util/pmus.c
> >>> index 58ff7937e9b7..4ef4fecd335f 100644
> >>> --- a/tools/perf/util/pmus.c
> >>> +++ b/tools/perf/util/pmus.c
> >>> @@ -12,13 +12,19 @@
> >>>  #include "pmu.h"
> >>>  #include "print-events.h"
> >>>
> >>> -static LIST_HEAD(pmus);
> >>> +static LIST_HEAD(core_pmus);
> >>> +static LIST_HEAD(other_pmus);
> >>
> >> AMD ibs_fetch// and ibs_op// PMUs are per SMT-thread and are independent of
> >> core hw pmu. I wonder where does IBS fit. Currently it's part of other_pmus.
> >> So, is it safe to assume that other_pmus are not just uncore pmus? In that
> >> case shall we add a comment here?
> >
> > I'm a fan of comments. The code has landed in perf-tools-next:
> > https://git.kernel.org/pub/scm/linux/kernel/git/acme/linux.git/tree/tools/perf/util/pmus.c?h=perf-tools-next
> > Do you have any suggestions on wording? I've had limited success
> > adding glossary terms, for example, offcore vs uncore:
> > https://perf.wiki.kernel.org/index.php/Glossary#Offcore
> > I think offcore is a more interconnect related term, but I'd prefer
> > not to be inventing the definitions. I'd like it if we could be less
> > ambiguous in the code and provide useful information on the wiki, so
> > help appreciated :-)
>
> Does this look good?
>
> /*
>  * core_pmus:  A PMU belongs to core_pmus if it's name is "cpu" or it's sysfs
>  *             directory contains "cpus" file. All PMUs belonging to core_pmus
>  *             must have pmu->is_core=1. If there are more than one PMUs in
>  *             this list, perf interprets it as a heterogeneous platform.


Looks good but a nit here. It is heterogeneous from point-of-view of
PMUs, there are ARM systems where they are heterogenous with big and
little cores but they have a single homogeneous PMU driver. The perf
tool will treat them as homogeneous.

Thanks,
Ian

>  * other_pmus: All other PMUs which are not part of core_pmus list. Does not
>  *             matter whether it is a per SMT-thread or outside of the core in
>  *             hw. i.e. PMUs belonging to other_pmus must have pmu->is_core=0
>  *             but pmu->is_uncore could be 0 or 1.
>  */
> static LIST_HEAD(core_pmus);
> static LIST_HEAD(other_pmus);
>
> Thanks,
> Ravi

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ