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Message-ID: <7d0ddbeb-c7a1-a5cf-9275-e1d9634cad0e@amd.com>
Date:   Fri, 9 Jun 2023 11:42:57 +0530
From:   Ravi Bangoria <ravi.bangoria@....com>
To:     Ian Rogers <irogers@...gle.com>
Cc:     Suzuki K Poulose <suzuki.poulose@....com>,
        Mike Leach <mike.leach@...aro.org>,
        Leo Yan <leo.yan@...aro.org>,
        John Garry <john.g.garry@...cle.com>,
        Will Deacon <will@...nel.org>,
        James Clark <james.clark@....com>,
        Peter Zijlstra <peterz@...radead.org>,
        Ingo Molnar <mingo@...hat.com>,
        Arnaldo Carvalho de Melo <acme@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
        Jiri Olsa <jolsa@...nel.org>,
        Namhyung Kim <namhyung@...nel.org>,
        Adrian Hunter <adrian.hunter@...el.com>,
        Kajol Jain <kjain@...ux.ibm.com>,
        Jing Zhang <renyu.zj@...ux.alibaba.com>,
        Kan Liang <kan.liang@...ux.intel.com>,
        Zhengjun Xing <zhengjun.xing@...ux.intel.com>,
        Madhavan Srinivasan <maddy@...ux.ibm.com>,
        Athira Rajeev <atrajeev@...ux.vnet.ibm.com>,
        Ming Wang <wangming01@...ngson.cn>,
        Huacai Chen <chenhuacai@...nel.org>,
        Sandipan Das <sandipan.das@....com>,
        Dmitrii Dolgov <9erthalion6@...il.com>,
        Sean Christopherson <seanjc@...gle.com>,
        Ali Saidi <alisaidi@...zon.com>, Rob Herring <robh@...nel.org>,
        Thomas Richter <tmricht@...ux.ibm.com>,
        Kang Minchul <tegongkang@...il.com>,
        linux-kernel@...r.kernel.org, coresight@...ts.linaro.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-perf-users@...r.kernel.org,
        Ravi Bangoria <ravi.bangoria@....com>
Subject: Re: [PATCH v5 29/34] perf pmus: Allow just core PMU scanning

Hi Ian,

> diff --git a/tools/perf/util/mem-events.c b/tools/perf/util/mem-events.c
> index 08ac3ea2e366..c5596230a308 100644
> --- a/tools/perf/util/mem-events.c
> +++ b/tools/perf/util/mem-events.c
> @@ -136,10 +136,7 @@ int perf_mem_events__init(void)
>  		} else {
>  			struct perf_pmu *pmu = NULL;
>  
> -			while ((pmu = perf_pmus__scan(pmu)) != NULL) {
> -				if (!pmu->is_core)
> -					continue;
> -
> +			while ((pmu = perf_pmus__scan_core(pmu)) != NULL) {
>  				scnprintf(sysfs_name, sizeof(sysfs_name),
>  					  e->sysfs_name, pmu->name);
>  				e->supported |= perf_mem_event__supported(mnt, sysfs_name);

As I mentioned in other patch, AMD ibs_op// currently belongs to "other_pmus"
list and perf mem/c2c uses IBS on AMD. perf mem/c2c on AMD are working even
after applying this patch because e->sysfs_name contains "ibs_op" and thus
sysfs_name contains "ibs_op", although pmu->name is "cpu".

Let me try to fix it. Suggestions are welcome :)

> @@ -176,10 +173,7 @@ static void perf_mem_events__print_unsupport_hybrid(struct perf_mem_event *e,
>  	char sysfs_name[100];
>  	struct perf_pmu *pmu = NULL;
>  
> -	while ((pmu = perf_pmus__scan(pmu)) != NULL) {
> -		if (!pmu->is_core)
> -			continue;
> -
> +	while ((pmu = perf_pmus__scan_core(pmu)) != NULL) {
>  		scnprintf(sysfs_name, sizeof(sysfs_name), e->sysfs_name,
>  			  pmu->name);
>  		if (!perf_mem_event__supported(mnt, sysfs_name)) {
> @@ -217,9 +211,7 @@ int perf_mem_events__record_args(const char **rec_argv, int *argv_nr,
>  				return -1;
>  			}
>  
> -			while ((pmu = perf_pmus__scan(pmu)) != NULL) {
> -				if (!pmu->is_core)
> -					continue;
> +			while ((pmu = perf_pmus__scan_core(pmu)) != NULL) {
>  				rec_argv[i++] = "-e";
>  				s = perf_mem_events__name(j, pmu->name);
>  				if (s) {

Thanks,
Ravi

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