linux-kernel - Re: [PATCH v8 2/7] iommu: Move global PASID allocation from SVA to core

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Sat, 10 Jun 2023 20:13:03 +0800
From:   Baolu Lu <baolu.lu@...ux.intel.com>
To:     Jacob Pan <jacob.jun.pan@...ux.intel.com>,
        LKML <linux-kernel@...r.kernel.org>, iommu@...ts.linux.dev,
        Jason Gunthorpe <jgg@...dia.com>,
        Joerg Roedel <joro@...tes.org>,
        Robin Murphy <robin.murphy@....com>,
        Jean-Philippe Brucker <jean-philippe@...aro.com>,
        dmaengine@...r.kernel.org, vkoul@...nel.org
Cc:     baolu.lu@...ux.intel.com, Will Deacon <will@...nel.org>,
        David Woodhouse <dwmw2@...radead.org>,
        Raj Ashok <ashok.raj@...el.com>,
        "Tian, Kevin" <kevin.tian@...el.com>, Yi Liu <yi.l.liu@...el.com>,
        "Yu, Fenghua" <fenghua.yu@...el.com>,
        Dave Jiang <dave.jiang@...el.com>,
        Tony Luck <tony.luck@...el.com>,
        "Zanussi, Tom" <tom.zanussi@...el.com>, rex.zhang@...el.com,
        xiaochen.shen@...el.com, narayan.ranganathan@...el.com
Subject: Re: [PATCH v8 2/7] iommu: Move global PASID allocation from SVA to
 core

On 6/3/23 2:22 AM, Jacob Pan wrote:
> +ioasid_t iommu_alloc_global_pasid_dev(struct device *dev)
> +{
> +	int ret;
> +	ioasid_t max;
> +
> +	max = dev->iommu->max_pasids;
> +	/*
> +	 * max_pasids is set up by vendor driver based on number of PASID bits
> +	 * supported but the IDA allocation is inclusive.
> +	 */
> +	ret = ida_alloc_range(&iommu_global_pasid_ida, IOMMU_FIRST_GLOBAL_PASID, max - 1, GFP_KERNEL);
> +	if (ret < 0)
> +		return IOMMU_PASID_INVALID;
> +
> +	return ret;
> +}
> +EXPORT_SYMBOL_GPL(iommu_alloc_global_pasid_dev);

"dev->iommu->max_pasids == 0" indicates no pasid support on the device.
The code should return IOMMU_PASID_INVALID explicitly. Perhaps we can
make this function like this:

ioasid_t iommu_alloc_global_pasid_dev(struct device *dev)
{
         int ret;

         if (!dev->iommu->max_pasids)
                 return IOMMU_PASID_INVALID;

         /*
          * max_pasids is set up by vendor driver based on number of 
PASID bits
          * supported but the IDA allocation is inclusive.
          */
         ret = ida_alloc_range(&iommu_global_pasid_ida, 
IOMMU_FIRST_GLOBAL_PASID,
                               dev->iommu->max_pasids - 1, GFP_KERNEL);

         return ret < 0 ? IOMMU_PASID_INVALID : ret;
}
EXPORT_SYMBOL_GPL(iommu_alloc_global_pasid_dev);

Other change in this series looks good to me.

I hope I can queue this series including above change as part of my VT-d
update for v6.5 to Joerg if no objection.

Let's try to re-enable this key feature of Intel idxd driver in v6.5.

Best regards,
baolu