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Message-ID: <ZISmmH0jqxZRB4VX@nanopsycho>
Date:   Sat, 10 Jun 2023 18:36:40 +0200
From:   Jiri Pirko <jiri@...nulli.us>
To:     Arkadiusz Kubalewski <arkadiusz.kubalewski@...el.com>
Cc:     kuba@...nel.org, vadfed@...a.com, jonathan.lemon@...il.com,
        pabeni@...hat.com, corbet@....net, davem@...emloft.net,
        edumazet@...gle.com, vadfed@...com, jesse.brandeburg@...el.com,
        anthony.l.nguyen@...el.com, saeedm@...dia.com, leon@...nel.org,
        richardcochran@...il.com, sj@...nel.org, javierm@...hat.com,
        ricardo.canuelo@...labora.com, mst@...hat.com, tzimmermann@...e.de,
        michal.michalik@...el.com, gregkh@...uxfoundation.org,
        jacek.lawrynowicz@...ux.intel.com, airlied@...hat.com,
        ogabbay@...nel.org, arnd@...db.de, nipun.gupta@....com,
        axboe@...nel.dk, linux@...y.sk, masahiroy@...nel.org,
        benjamin.tissoires@...hat.com, geert+renesas@...der.be,
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        phil@....cc, claudiajkang@...il.com, linux-doc@...r.kernel.org,
        linux-kernel@...r.kernel.org, netdev@...r.kernel.org,
        intel-wired-lan@...ts.osuosl.org, linux-rdma@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, poros@...hat.com,
        mschmidt@...hat.com, linux-clk@...r.kernel.org,
        vadim.fedorenko@...ux.dev
Subject: Re: [RFC PATCH v8 08/10] ice: implement dpll interface to control cgu

Fri, Jun 09, 2023 at 02:18:51PM CEST, arkadiusz.kubalewski@...el.com wrote:

[...]


>+static int ice_dpll_mode_get(const struct dpll_device *dpll, void *priv,
>+			     enum dpll_mode *mode,
>+			     struct netlink_ext_ack *extack)
>+{
>+	*mode = DPLL_MODE_AUTOMATIC;

I don't understand how the automatic mode could work with SyncE. The
There is one pin exposed for one netdev. The SyncE daemon should select
exacly one pin. How do you achieve that?
Is is by setting DPLL_PIN_STATE_SELECTABLE on the pin-netdev you want to
select and DPLL_PIN_STATE_DISCONNECTED on the rest?


[...]

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