linux-kernel - Re: [PATCH net-next v5] net: phy: add driver for MediaTek SoC built-in GE PHYs

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <3c1aee38-3e8d-48ea-955b-995c9ec83cfb@lunn.ch>
Date:   Sun, 11 Jun 2023 17:16:56 +0200
From:   Andrew Lunn <andrew@...n.ch>
To:     Daniel Golle <daniel@...rotopia.org>
Cc:     netdev@...r.kernel.org, linux-mediatek@...ts.infradead.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>,
        Matthias Brugger <matthias.bgg@...il.com>,
        SkyLake Huang <SkyLake.Huang@...iatek.com>,
        Qingfang Deng <dqfext@...il.com>,
        Paolo Abeni <pabeni@...hat.com>,
        Jakub Kicinski <kuba@...nel.org>,
        Eric Dumazet <edumazet@...gle.com>,
        "David S. Miller" <davem@...emloft.net>,
        Russell King <linux@...linux.org.uk>,
        Heiner Kallweit <hkallweit1@...il.com>
Subject: Re: [PATCH net-next v5] net: phy: add driver for MediaTek SoC
 built-in GE PHYs

On Sun, Jun 11, 2023 at 12:48:10AM +0100, Daniel Golle wrote:
> Some of MediaTek's Filogic SoCs come with built-in gigabit Ethernet
> PHYs which require calibration data from the SoC's efuse.
> Despite the similar design the driver doesn't share any code with the
> existing mediatek-ge.c.
> Add support for such PHYs by introducing a new driver with basic
> support for MediaTek SoCs MT7981 and MT7988 built-in 1GE PHYs.
> 
> Signed-off-by: Daniel Golle <daniel@...rotopia.org>

Reviewed-by: Andrew Lunn <andrew@...n.ch>

> +static void mt798x_phy_eee(struct phy_device *phydev)
> +{
> +	phy_modify_mmd(phydev, MDIO_MMD_VEND1,
> +		       MTK_PHY_RG_LPI_PCS_DSP_CTRL_REG120,
> +		       MTK_PHY_LPI_SIG_EN_LO_THRESH1000_MASK |
> +		       MTK_PHY_LPI_SIG_EN_HI_THRESH1000_MASK,
> +		       FIELD_PREP(MTK_PHY_LPI_SIG_EN_LO_THRESH1000_MASK, 0x0) |
> +		       FIELD_PREP(MTK_PHY_LPI_SIG_EN_HI_THRESH1000_MASK, 0x14));

Does this PHY have SmartEEE? Where the PHY itself does EEE without the
help of the MAC? At some point we would like to properly support that,
but first we need to sort out the mess MAC/PHY EEE is in.

    Andrew