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Message-ID: <20230611183024.6e6fd46a@pc-7.home>
Date: Sun, 11 Jun 2023 18:30:24 +0200
From: Maxime Chevallier <maxime.chevallier@...tlin.com>
To: "Russell King (Oracle)" <linux@...linux.org.uk>
Cc: davem@...emloft.net, netdev@...r.kernel.org,
linux-kernel@...r.kernel.org, thomas.petazzoni@...tlin.com,
Andrew Lunn <andrew@...n.ch>, Jakub Kicinski <kuba@...nel.org>,
Eric Dumazet <edumazet@...gle.com>,
Paolo Abeni <pabeni@...hat.com>,
linux-arm-kernel@...ts.infradead.org,
Simon Horman <simon.horman@...igine.com>,
alexis.lothore@...tlin.com
Subject: Re: [PATCH net-next] net: altera_tse: fix init sequence to avoid
races with register_netdev
Hi,
On Sun, 11 Jun 2023 16:42:26 +0100
"Russell King (Oracle)" <linux@...linux.org.uk> wrote:
> On Sun, Jun 11, 2023 at 12:40:19PM +0200, Maxime Chevallier wrote:
> > As reported here[1], the init sequence in altera_tse can be racy should
> > any operation on the registered netdev happen after netdev registration
> > but before phylink initialization.
> >
> > Fix the registering order to avoid such races by making register_netdev
> > the last step of the probing sequence.
> >
> > [1]: https://lore.kernel.org/netdev/ZH9XK5yEGyoDMIs%2F@shell.armlinux.org.uk/
> >
> > Fixes: fef2998203e1 ("net: altera: tse: convert to phylink")
> > Signed-off-by: Maxime Chevallier <maxime.chevallier@...tlin.com>
> > ---
> > This patch targets net-next as it fixes a commit that is in net-next
> > too.
>
> While it fixes the order in which stuff is registered, it introduces
> a new bug - register_netdev() is what atomically allocated a netdev
> name, and you use the netdev name when creating the PCS MII bus:
>
> snprintf(mrc.name, MII_BUS_ID_SIZE, "%s-pcs-mii", ndev->name);
>
> This needs to change, because this will end up being "eth%d-pcs-mii".
>
> I am at a loss why you didn't realise this (or in fact recognise that
> there are other issues) given that I sent you three patches fixing
> this mess.
>
Hmpf your patches went un-noticed, sorry... I'll base later work on that.
I will also followup with a similar series for dwmac-socfpga
Best regards,
Maxime
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