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Message-ID: <20230612192700.nd5t4ekt6my5dqqo@mobilestation>
Date: Mon, 12 Jun 2023 22:27:00 +0300
From: Serge Semin <fancer.lancer@...il.com>
To: Sebastian Reichel <sebastian.reichel@...labora.com>
Cc: Heiko Stuebner <heiko@...ech.de>, Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Damien Le Moal <damien.lemoal@...nsource.wdc.com>,
Vinod Koul <vkoul@...nel.org>,
Kishon Vijay Abraham I <kishon@...nel.org>,
linux-ide@...r.kernel.org, linux-phy@...ts.infradead.org,
linux-rockchip@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, kernel@...labora.com
Subject: Re: [PATCH v4 2/5] dt-bindings: ata: dwc-ahci: add Rockchip RK3588
On Mon, Jun 12, 2023 at 07:13:34PM +0200, Sebastian Reichel wrote:
> This adds Rockchip RK3588 AHCI binding. In order to narrow down the
> allowed clocks without bloating the generic binding, the description
> of Rockchip's AHCI controllers has been moved to its own file.
>
> Signed-off-by: Sebastian Reichel <sebastian.reichel@...labora.com>
Thanks. The patch now looks good.
Reviewed-by: Serge Semin <fancer.lancer@...il.com>
-Serge(y)
> ---
> .../bindings/ata/rockchip,dwc-ahci.yaml | 124 ++++++++++++++++++
> .../bindings/ata/snps,dwc-ahci.yaml | 13 +-
> 2 files changed, 133 insertions(+), 4 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/ata/rockchip,dwc-ahci.yaml
>
> diff --git a/Documentation/devicetree/bindings/ata/rockchip,dwc-ahci.yaml b/Documentation/devicetree/bindings/ata/rockchip,dwc-ahci.yaml
> new file mode 100644
> index 000000000000..b5e5767d8698
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/ata/rockchip,dwc-ahci.yaml
> @@ -0,0 +1,124 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/ata/rockchip,dwc-ahci.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Synopsys DWC AHCI SATA controller for Rockchip devices
> +
> +maintainers:
> + - Serge Semin <fancer.lancer@...il.com>
> +
> +description:
> + This document defines device tree bindings for the Synopsys DWC
> + implementation of the AHCI SATA controller found in Rockchip
> + devices.
> +
> +select:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - rockchip,rk3568-dwc-ahci
> + - rockchip,rk3588-dwc-ahci
> + required:
> + - compatible
> +
> +properties:
> + compatible:
> + items:
> + - enum:
> + - rockchip,rk3568-dwc-ahci
> + - rockchip,rk3588-dwc-ahci
> + - const: snps,dwc-ahci
> +
> + ports-implemented:
> + const: 1
> +
> + sata-port@0:
> + $ref: /schemas/ata/snps,dwc-ahci-common.yaml#/$defs/dwc-ahci-port
> +
> + properties:
> + reg:
> + const: 0
> +
> + unevaluatedProperties: false
> +
> +patternProperties:
> + "^sata-port@[1-9a-e]$": false
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - clocks
> + - clock-names
> + - ports-implemented
> +
> +allOf:
> + - $ref: snps,dwc-ahci-common.yaml#
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - rockchip,rk3588-dwc-ahci
> + then:
> + properties:
> + clocks:
> + maxItems: 5
> + clock-names:
> + items:
> + - const: sata
> + - const: pmalive
> + - const: rxoob
> + - const: ref
> + - const: asic
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - rockchip,rk3568-dwc-ahci
> + then:
> + properties:
> + clocks:
> + maxItems: 3
> + clock-names:
> + items:
> + - const: sata
> + - const: pmalive
> + - const: rxoob
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/rockchip,rk3588-cru.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/ata/ahci.h>
> + #include <dt-bindings/phy/phy.h>
> +
> + sata@...10000 {
> + compatible = "rockchip,rk3588-dwc-ahci", "snps,dwc-ahci";
> + reg = <0xfe210000 0x1000>;
> + clocks = <&cru ACLK_SATA0>, <&cru CLK_PMALIVE0>,
> + <&cru CLK_RXOOB0>, <&cru CLK_PIPEPHY0_REF>,
> + <&cru CLK_PIPEPHY0_PIPE_ASIC_G>;
> + clock-names = "sata", "pmalive", "rxoob", "ref", "asic";
> + interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH 0>;
> + ports-implemented = <0x1>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + sata-port@0 {
> + reg = <0>;
> + hba-port-cap = <HBA_PORT_FBSCP>;
> + phys = <&combphy0_ps PHY_TYPE_SATA>;
> + phy-names = "sata-phy";
> + snps,rx-ts-max = <32>;
> + snps,tx-ts-max = <32>;
> + };
> + };
> +
> +...
> diff --git a/Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml b/Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml
> index 5afa4b57ce20..4c848fcb5a5d 100644
> --- a/Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml
> +++ b/Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml
> @@ -13,6 +13,15 @@ description:
> This document defines device tree bindings for the generic Synopsys DWC
> implementation of the AHCI SATA controller.
>
> +select:
> + properties:
> + compatible:
> + enum:
> + - snps,dwc-ahci
> + - snps,spear-ahci
> + required:
> + - compatible
> +
> allOf:
> - $ref: snps,dwc-ahci-common.yaml#
>
> @@ -23,10 +32,6 @@ properties:
> const: snps,dwc-ahci
> - description: SPEAr1340 AHCI SATA device
> const: snps,spear-ahci
> - - description: Rockhip RK3568 AHCI controller
> - items:
> - - const: rockchip,rk3568-dwc-ahci
> - - const: snps,dwc-ahci
>
> patternProperties:
> "^sata-port@[0-9a-e]$":
> --
> 2.39.2
>
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