linux-kernel - Re: [PATCH v2 0/2] PCI: pciehp: Add support for native AER and DPC handling on async remove

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Message-ID: <2deec417-b1f6-5831-23f2-91fda2c802e5@amd.com>
Date:   Mon, 12 Jun 2023 12:31:37 -0700
From:   Smita Koralahalli <Smita.KoralahalliChannabasappa@....com>
To:     Bjorn Helgaas <helgaas@...nel.org>
Cc:     linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org,
        Bjorn Helgaas <bhelgaas@...gle.com>, oohall@...il.com,
        Mahesh J Salgaonkar <mahesh@...ux.ibm.com>,
        Lukas Wunner <lukas@...ner.de>,
        Kuppuswamy Sathyanarayanan 
        <sathyanarayanan.kuppuswamy@...ux.intel.com>,
        Yazen Ghannam <yazen.ghannam@....com>,
        Fontenot Nathan <Nathan.Fontenot@....com>
Subject: Re: [PATCH v2 0/2] PCI: pciehp: Add support for native AER and DPC
 handling on async remove

On 6/12/2023 10:54 AM, Bjorn Helgaas wrote:
> On Tue, May 09, 2023 at 01:58:37PM -0700, Smita Koralahalli wrote:
>> Hi,
>>
>> Could I please get review comments on my patch set? I had re-based
>> it on latest tree in v2 as I did not hear back on my questions in
>> v1.
> 
> Thanks for persevering.  It looks like there may still be some ongoing
> discussion with Lukas?  And a few of his comments that you plan to
> address?  Thanks for looking into the 10-bit tag issue.  I know those
> tag widths are non-trivial to handle correctly and it would be good to
> clean them up.
> 
> Bjorn

Yeah. Since we didn't come to a conclusion on how should we attempt 
clearing 10-bit tags and Atomic Op Requestor, I held on preparing v3.

https://lore.kernel.org/all/cc36bb5b-6a4a-258b-6707-4d019154e019@amd.com/

But I can go ahead and send v3 for just the first patch, 
https://lore.kernel.org/all/8ab986f2-6aa5-401a-aa21-e8b21f68eaad@amd.com/ and 
wait on Lukas for 10-bit tag issue.

Thanks,
Smita