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Message-ID: <20230612-unstable-tilt-1835f84363b1@spud>
Date: Mon, 12 Jun 2023 22:31:14 +0100
From: Conor Dooley <conor@...nel.org>
To: Heiko Stuebner <heiko@...ech.de>
Cc: palmer@...belt.com, paul.walmsley@...ive.com,
aou@...s.berkeley.edu, herbert@...dor.apana.org.au,
davem@...emloft.net, conor.dooley@...rochip.com,
linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-crypto@...r.kernel.org, christoph.muellner@...ll.eu,
Heiko Stuebner <heiko.stuebner@...ll.eu>
Subject: Re: [PATCH v5 1/4] RISC-V: add Zbc extension detection
Hey Heiko,
On Mon, Jun 12, 2023 at 11:04:39PM +0200, Heiko Stuebner wrote:
> From: Heiko Stuebner <heiko.stuebner@...ll.eu>
>
> Add handling for Zbc extension.
>
> Zbc provides instruction for carry-less multiplication.
>
> Signed-off-by: Heiko Stuebner <heiko.stuebner@...ll.eu>
> ---
> arch/riscv/Kconfig | 22 ++++++++++++++++++++++
> arch/riscv/include/asm/hwcap.h | 1 +
> arch/riscv/kernel/cpu.c | 1 +
> arch/riscv/kernel/cpufeature.c | 1 +
> 4 files changed, 25 insertions(+)
Plumbing into the hwprobe stuff would be nice, but that's not a
requirement for getting stuff merged :)
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index a3d54cd14fca..754cd154eca5 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -523,6 +523,28 @@ config RISCV_ISA_ZBB
>
> If you don't know what to do here, say Y.
>
> +config TOOLCHAIN_HAS_ZBC
> + bool
> + default y
> + depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zbc)
> + depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zbc)
> + depends on LLD_VERSION >= 150000 || LD_VERSION >= 23900
> + depends on AS_IS_GNU
> +
> +config RISCV_ISA_ZBC
> + bool "Zbc extension support for bit manipulation instructions"
> + depends on TOOLCHAIN_HAS_ZBC
> + depends on !XIP_KERNEL && MMU
> + default y
> + help
> + Adds support to dynamically detect the presence of the ZBC
Nit: s/ZBC/Zbc/
Reviewed-by: Conor Dooley <conor.dooley@...rochip.com>
Cheers,
Conor.
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