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Message-ID: <2d3cd099714369d6f7ceb5c89595a9c4cf42e9a2.camel@intel.com>
Date: Mon, 12 Jun 2023 02:28:41 +0000
From: "Huang, Kai" <kai.huang@...el.com>
To: "sathyanarayanan.kuppuswamy@...ux.intel.com"
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Subject: Re: [PATCH v11 11/20] x86/virt/tdx: Fill out TDMRs to cover all TDX
memory regions
On Thu, 2023-06-08 at 21:01 -0700, Sathyanarayanan Kuppuswamy wrote:
>
> On 6/4/23 7:27 AM, Kai Huang wrote:
> > Start to transit out the "multi-steps" to construct a list of "TD Memory
> > Regions" (TDMRs) to cover all TDX-usable memory regions.
> >
> > The kernel configures TDX-usable memory regions by passing a list of
> > TDMRs "TD Memory Regions" (TDMRs) to the TDX module. Each TDMR contains
> > the information of the base/size of a memory region, the base/size of the
> > associated Physical Address Metadata Table (PAMT) and a list of reserved
> > areas in the region.
> >
> > Do the first step to fill out a number of TDMRs to cover all TDX memory
> > regions. To keep it simple, always try to use one TDMR for each memory
> > region. As the first step only set up the base/size for each TDMR.
>
> As a first step?
Not sure there are two or more first steps? I think I'll keep it as is.
[...]
> > +#define TDMR_ALIGNMENT BIT_ULL(30)
> > +#define TDMR_PFN_ALIGNMENT (TDMR_ALIGNMENT >> PAGE_SHIFT)
>
> This macro is never used. Maybe you can drop it from this patch.
OK will do.
[...]
>
> Rest looks good to me.
>
> Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@...ux.intel.com>
>
Thanks.
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