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Message-ID: <fc4930150f3242e69dcb007c0b23cfd2@AcuMS.aculab.com>
Date: Mon, 12 Jun 2023 13:18:01 +0000
From: David Laight <David.Laight@...LAB.COM>
To: "'kirill.shutemov@...ux.intel.com'" <kirill.shutemov@...ux.intel.com>,
"Huang, Kai" <kai.huang@...el.com>
CC: "kvm@...r.kernel.org" <kvm@...r.kernel.org>,
"Hansen, Dave" <dave.hansen@...el.com>,
"david@...hat.com" <david@...hat.com>,
"bagasdotme@...il.com" <bagasdotme@...il.com>,
"ak@...ux.intel.com" <ak@...ux.intel.com>,
"Wysocki, Rafael J" <rafael.j.wysocki@...el.com>,
"Luck, Tony" <tony.luck@...el.com>,
"Chatre, Reinette" <reinette.chatre@...el.com>,
"Christopherson,, Sean" <seanjc@...gle.com>,
"pbonzini@...hat.com" <pbonzini@...hat.com>,
"tglx@...utronix.de" <tglx@...utronix.de>,
"Yamahata, Isaku" <isaku.yamahata@...el.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-mm@...ck.org" <linux-mm@...ck.org>,
"Shahar, Sagi" <sagis@...gle.com>,
"peterz@...radead.org" <peterz@...radead.org>,
"imammedo@...hat.com" <imammedo@...hat.com>,
"Gao, Chao" <chao.gao@...el.com>,
"Brown, Len" <len.brown@...el.com>,
"sathyanarayanan.kuppuswamy@...ux.intel.com"
<sathyanarayanan.kuppuswamy@...ux.intel.com>,
"Huang, Ying" <ying.huang@...el.com>,
"Williams, Dan J" <dan.j.williams@...el.com>
Subject: RE: [PATCH v11 18/20] x86: Handle TDX erratum to reset TDX private
memory during kexec() and reboot
From: kirill.shutemov@...ux.intel.com
> Sent: 12 June 2023 12:49
>
> On Mon, Jun 12, 2023 at 10:27:44AM +0000, Huang, Kai wrote:
> > Does it make sense?
>
> I understand your logic. AFAICS, it is correct (smp_mb() instead of __mb()
> would be better), but it is not justified from complexity PoV.
Given that x86 performs writes pretty much in code order.
Do you need anything more than a compile barrier?
> This lockless exercise gave me a pause to understand.
>
> Lockless doesn't buy you anything here, only increases complexity.
> Just take a lock.
Indeed...
David
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