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Message-ID: <e88bc99a407c1c12b22e20d7b29fbc5e.sboyd@kernel.org>
Date: Mon, 12 Jun 2023 18:20:35 -0700
From: Stephen Boyd <sboyd@...nel.org>
To: AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>, mturquette@...libre.com
Cc: matthias.bgg@...il.com, angelogioacchino.delregno@...labora.com,
wenst@...omium.org, chun-jie.chen@...iatek.com,
mandyjh.liu@...iatek.com, miles.chen@...iatek.com,
zhaojh329@...il.com, daniel@...rotopia.org,
nfraprado@...labora.com, rex-bc.chen@...iatek.com,
Garmin.Chang@...iatek.com, msp@...libre.com,
yangyingliang@...wei.com, linux-clk@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org, kernel@...labora.com
Subject: Re: [PATCH v2 2/2] clk: mediatek: Remove CLK_SET_PARENT from all MSDC core clocks
Quoting AngeloGioacchino Del Regno (2023-05-16 06:52:05)
> Various MSDC core clocks, used for multiple MSDC controller instances,
> share the same parent(s): in order to add parents selection in the
> mtk-sd driver to achieve an accurate clock rate for all modes, remove
> the CLK_SET_RATE_PARENT flag from all MSDC clocks for all SoCs: this
> will make sure that a clk_set_rate() call performed for a clock on
> a secondary controller will not change the rate of a common parent,
> which would result in an overclock or underclock of one of the
> controllers.
>
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
> Reviewed-by: Matthias Brugger <matthias.bgg@...il.com>
> Reviewed-by: Markus Schneider-Pargmann <msp@...libre.com>
> ---
Applied to clk-next
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