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Message-Id: <20230614065949.146187-3-anshuman.khandual@arm.com>
Date:   Wed, 14 Jun 2023 12:29:37 +0530
From:   Anshuman Khandual <anshuman.khandual@....com>
To:     linux-arm-kernel@...ts.infradead.org, broonie@...nel.org
Cc:     Anshuman Khandual <anshuman.khandual@....com>,
        Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will@...nel.org>, Marc Zyngier <maz@...nel.org>,
        Rob Herring <robh@...nel.org>,
        Suzuki K Poulose <suzuki.poulose@....com>,
        James Morse <james.morse@....com>, kvmarm@...ts.linux.dev,
        coresight@...ts.linaro.org, linux-kernel@...r.kernel.org
Subject: [PATCH V3 02/14] arm64/sysreg: Rename TRBPTR_EL1 fields per auto-gen tools format

This renames TRBPTR_EL1 register fields per auto-gen tools format without
causing any functional change in the TRBE driver.

Cc: Catalin Marinas <catalin.marinas@....com>
Cc: Will Deacon <will@...nel.org>
Cc: Marc Zyngier <maz@...nel.org>
Cc: Mark Brown <broonie@...nel.org>
Cc: Rob Herring <robh@...nel.org>
Cc: Suzuki K Poulose <suzuki.poulose@....com>
Cc: James Morse <james.morse@....com>
Cc: kvmarm@...ts.linux.dev
Cc: coresight@...ts.linaro.org
Cc: linux-arm-kernel@...ts.infradead.org
Cc: linux-kernel@...r.kernel.org
Signed-off-by: Anshuman Khandual <anshuman.khandual@....com>
---
 arch/arm64/include/asm/sysreg.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 1be3a44b8289..b7a0d7d0f4d6 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -260,8 +260,8 @@
 #define TRBLIMITR_EL1_FM_MASK		GENMASK(2, 1)
 #define TRBLIMITR_EL1_FM_SHIFT		1
 #define TRBLIMITR_EL1_E			BIT(0)
-#define TRBPTR_PTR_MASK			GENMASK_ULL(63, 0)
-#define TRBPTR_PTR_SHIFT		0
+#define TRBPTR_EL1_PTR_MASK		GENMASK_ULL(63, 0)
+#define TRBPTR_EL1_PTR_SHIFT		0
 #define TRBBASER_BASE_MASK		GENMASK_ULL(51, 0)
 #define TRBBASER_BASE_SHIFT		12
 #define TRBSR_EC_MASK			GENMASK(5, 0)
-- 
2.25.1

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