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Message-ID: <DM6PR11MB2779545C0ACBF833E857EBD28C5BA@DM6PR11MB2779.namprd11.prod.outlook.com>
Date:   Thu, 15 Jun 2023 15:05:42 +0000
From:   "Jadav, Raag" <raag.jadav@...el.com>
To:     Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
CC:     "linus.walleij@...aro.org" <linus.walleij@...aro.org>,
        "mika.westerberg@...ux.intel.com" <mika.westerberg@...ux.intel.com>,
        "linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "Sangannavar, Mallikarjunappa" 
        <mallikarjunappa.sangannavar@...el.com>,
        "N, Pandith" <pandith.n@...el.com>
Subject: RE: [PATCH v4] pinctrl: intel: refine ->irq_set_type() hook

> On Thu, Jun 15, 2023 at 01:35:19PM +0000, Jadav, Raag wrote:
> > > On Thu, Jun 15, 2023 at 06:20:22PM +0530, Raag Jadav wrote:
> > > > Refine ->irq_set_type() hook and improve its readability by:
> > > >
> > > > - Reducing scope of spinlock by moving unneeded operations out of it.
> > > > - Dropping redundant PADCFG0_RXEVCFG_SHIFT and including it
> directly
> > > >   into PADCFG0_RXEVCFG_* definitions.
> > > > - Utilizing temporary variables for common operations.
> > > > - Simplifying if-else-if chain.
> > >
> > > Two questions out of curiosity.
> > > Do we gain or lose bytes with this?
> >
> > add/remove: 0/0 grow/shrink: 1/0 up/down: 33/0 (33)
> > Function                                     old     new   delta
> > intel_gpio_irq_type                          317     350     +33
> > Total: Before=10469, After=10502, chg +0.32%
> >
> > > > +	value = readl(reg);
> > >
> > > > +	value = (value & ~PADCFG0_RXINV) | rxinv;
> > > > +	value = (value & ~PADCFG0_RXEVCFG_MASK) | rxevcfg;
> > >
> > > Same question if we change this to be similar to the current code, i.e.
> > >
> > > 	value = readl(reg);
> > >
> > > 	value &= ~(PADCFG0_RXEVCFG_MASK | PADCFG0_RXINV);
> > > 	value |= rxevcfg;
> > > 	value |= rxinv;
> > >
> > > And I would keep blank lines after readl() and before writel() since
> > > we have more than a single line in between.
> >
> > add/remove: 0/0 grow/shrink: 0/1 up/down: 0/-9 (-9)
> > Function                                     old     new   delta
> > intel_gpio_irq_type                          317     308      -9
> > Total: Before=10469, After=10460, chg -0.09%
> 
> Do I understand correctly that this is your patch + suggested above?

Yes, this is tested with gcc 7.5.0 with default -O2.
I see some reordering in disassembly even with this simple change,
and I'm not entirely sure what kind of weird tricks gcc is pulling here.

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