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Message-Id: <20230615205540.1803975-4-bigunclemax@gmail.com>
Date: Thu, 15 Jun 2023 23:55:22 +0300
From: Maksim Kiselev <bigunclemax@...il.com>
To: linux-iio@...r.kernel.org
Cc: Maksim Kiselev <bigunclemax@...il.com>,
Jonathan Cameron <jic23@...nel.org>,
Lars-Peter Clausen <lars@...afoo.de>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Chen-Yu Tsai <wens@...e.org>,
Jernej Skrabec <jernej.skrabec@...il.com>,
Samuel Holland <samuel@...lland.org>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
Philipp Zabel <p.zabel@...gutronix.de>,
Cristian Ciocaltea <cristian.ciocaltea@...labora.com>,
Andy Shevchenko <andy.shevchenko@...il.com>,
Cosmin Tanislav <demonsingur@...il.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>,
Haibo Chen <haibo.chen@....com>,
ChiaEn Wu <chiaen_wu@...htek.com>,
Leonard Göhrs <l.goehrs@...gutronix.de>,
Caleb Connolly <caleb.connolly@...aro.org>,
ChiYuan Huang <cy_huang@...htek.com>,
Ramona Bolboaca <ramona.bolboaca@...log.com>,
Ibrahim Tilki <Ibrahim.Tilki@...log.com>,
William Breathitt Gray <william.gray@...aro.org>,
Arnd Bergmann <arnd@...db.de>,
Mike Looijmans <mike.looijmans@...ic.nl>,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-sunxi@...ts.linux.dev, linux-kernel@...r.kernel.org,
linux-riscv@...ts.infradead.org
Subject: [PATCH v7 3/3] riscv: dts: allwinner: d1: Add GPADC node
This patch adds declaration of the general purpose ADC for D1
and T113s SoCs.
Signed-off-by: Maksim Kiselev <bigunclemax@...il.com>
---
arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
index 922e8e0e2c09..90c79041cfba 100644
--- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
+++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
@@ -138,6 +138,16 @@ ccu: clock-controller@...1000 {
#reset-cells = <1>;
};
+ gpadc: adc@...9000 {
+ compatible = "allwinner,sun20i-d1-gpadc";
+ reg = <0x2009000 0x1000>;
+ clocks = <&ccu CLK_BUS_GPADC>;
+ resets = <&ccu RST_BUS_GPADC>;
+ interrupts = <SOC_PERIPHERAL_IRQ(57) IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ #io-channel-cells = <1>;
+ };
+
dmic: dmic@...1000 {
compatible = "allwinner,sun20i-d1-dmic",
"allwinner,sun50i-h6-dmic";
--
2.39.2
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