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Message-ID: <a1d6e35c-3f70-4cb1-978a-7b0cf3f63ffa@lunn.ch>
Date:   Fri, 16 Jun 2023 22:49:50 +0200
From:   Andrew Lunn <andrew@...n.ch>
To:     "Radu Pirea (NXP OSS)" <radu-nicolae.pirea@....nxp.com>
Cc:     hkallweit1@...il.com, linux@...linux.org.uk, davem@...emloft.net,
        edumazet@...gle.com, kuba@...nel.org, pabeni@...hat.com,
        richardcochran@...il.com, netdev@...r.kernel.org,
        linux-kernel@...r.kernel.org, sebastian.tobuschat@....com
Subject: Re: [PATCH net-next v1 06/14] net: phy: add 1000baseT1 to
 phy_basic_t1_features

On Fri, Jun 16, 2023 at 04:53:15PM +0300, Radu Pirea (NXP OSS) wrote:
> Add 1000baseT1 bit to phy_basic_t1_features.

Please add an explanation why this is safe. For example, why the
RTL9000AA does not start saying it supports 1000BaseT1_Full.

Has 1000BaseT1_Full been standardised? If there a feature bit in a
register to indicate the hardware supports it? That would be the
preferred method to determine what the hardware can do.

	Andrew

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