linux-kernel - RE: [PATCH 1/3] dt-bindings: can: xilinx_can: Add ECC property ‘xlnx,has-ecc’

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Date:   Fri, 16 Jun 2023 10:13:56 +0000
From:   "Goud, Srinivas" <srinivas.goud@....com>
To:     Krzysztof Kozlowski <krzk@...nel.org>,
        Marc Kleine-Budde <mkl@...gutronix.de>
CC:     "wg@...ndegger.com" <wg@...ndegger.com>,
        "davem@...emloft.net" <davem@...emloft.net>,
        "edumazet@...gle.com" <edumazet@...gle.com>,
        "kuba@...nel.org" <kuba@...nel.org>,
        "pabeni@...hat.com" <pabeni@...hat.com>,
        "gcnu.goud@...il.com" <gcnu.goud@...il.com>,
        "git (AMD-Xilinx)" <git@....com>,
        "michal.simek@...inx.com" <michal.simek@...inx.com>,
        "linux-can@...r.kernel.org" <linux-can@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH 1/3] dt-bindings: can: xilinx_can: Add ECC property ‘xlnx,has-ecc’

Hi

>-----Original Message-----
>From: Krzysztof Kozlowski <krzk@...nel.org>
>Sent: Wednesday, June 14, 2023 4:41 PM
>To: Goud, Srinivas <srinivas.goud@....com>; Marc Kleine-Budde
><mkl@...gutronix.de>
>Cc: wg@...ndegger.com; davem@...emloft.net; edumazet@...gle.com;
>kuba@...nel.org; pabeni@...hat.com; gcnu.goud@...il.com; git (AMD-
>Xilinx) <git@....com>; michal.simek@...inx.com; linux-can@...r.kernel.org;
>linux-arm-kernel@...ts.infradead.org; linux-kernel@...r.kernel.org
>Subject: Re: [PATCH 1/3] dt-bindings: can: xilinx_can: Add ECC property
>‘xlnx,has-ecc’
>
>On 14/06/2023 12:22, Goud, Srinivas wrote:
>> Hi,
>>
>>> -----Original Message-----
>>> From: Marc Kleine-Budde <mkl@...gutronix.de>
>>> Sent: Tuesday, June 13, 2023 1:23 PM
>>> To: Goud, Srinivas <srinivas.goud@....com>
>>> Cc: wg@...ndegger.com; davem@...emloft.net; edumazet@...gle.com;
>>> kuba@...nel.org; pabeni@...hat.com; gcnu.goud@...il.com; git (AMD-
>>> Xilinx) <git@....com>; michal.simek@...inx.com;
>>> linux-can@...r.kernel.org; linux-arm-kernel@...ts.infradead.org;
>>> linux-kernel@...r.kernel.org
>>> Subject: Re: [PATCH 1/3] dt-bindings: can: xilinx_can: Add ECC
>>> property ‘xlnx,has-ecc’
>>>
>>> On 12.06.2023 17:12:55, Srinivas Goud wrote:
>>>> ECC feature added to Tx and Rx FIFO’s for Xilinx CAN Controller.
>>>> Part of this feature configuration and counter registers added in IP
>>>> for 1bit/2bit ECC errors.
>>>> Please find more details in PG096 v5.1 document.
>>>>
>>>> xlnx,has-ecc is optional property and added to Xilinx CAN Controller
>>>> node if ECC block enabled in the HW.
>>>>
>>>> Signed-off-by: Srinivas Goud <srinivas.goud@....com>
>>>
>>> Is there a way to introspect the IP core to check if this feature is compiled in?
>> There is no way(IP registers) to indicate whether ECC feature is enabled or
>not.
>
>Isn't this then deductible from compatible? Your binding claims it is only for
>AXI CAN, so xlnx,axi-can-1.00.a, even though you did not restrict it in the
>binding.
Agree it is only for AXI CAN(xlnx,axi-can-1.00.a) but ECC feature is
configurable option to the user.
ECC is added as optional configuration(enable/disable) feature 
to the existing AXI CAN.

Thanks,
Srinivas