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Message-ID: <c7b0c22b-4132-4159-797b-c24e85b62d16@arinc9.com>
Date:   Fri, 16 Jun 2023 05:24:05 +0300
From:   Arınç ÜNAL <arinc.unal@...nc9.com>
To:     Bartel Eerdekens <bartel.eerdekens@...stell8.be>,
        "Russell King (Oracle)" <linux@...linux.org.uk>
Cc:     Daniel Golle <daniel@...rotopia.org>,
        Landen Chao <Landen.Chao@...iatek.com>,
        DENG Qingfang <dqfext@...il.com>,
        Sean Wang <sean.wang@...iatek.com>,
        Andrew Lunn <andrew@...n.ch>,
        Florian Fainelli <f.fainelli@...il.com>,
        Vladimir Oltean <olteanv@...il.com>,
        "David S. Miller" <davem@...emloft.net>,
        Eric Dumazet <edumazet@...gle.com>,
        Jakub Kicinski <kuba@...nel.org>,
        Paolo Abeni <pabeni@...hat.com>,
        Matthias Brugger <matthias.bgg@...il.com>,
        AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>,
        Frank Wunderlich <frank-w@...lic-files.de>,
        mithat.guner@...ont.com, erkin.bozoglu@...ont.com,
        linux-kernel@...r.kernel.org, netdev@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org
Subject: Re: [PATCH net v4 5/7] net: dsa: mt7530: fix handling of LLDP frames

On 16.06.2023 04:53, Arınç ÜNAL wrote:
> On 15.06.2023 15:45, Bartel Eerdekens wrote:
>> On Wed, Jun 14, 2023 at 6:42 PM Russell King (Oracle)
>> <linux@...linux.org.uk> wrote:
>>>
>>> On Mon, Jun 12, 2023 at 10:59:43AM +0300, arinc9.unal@...il.com wrote:
>>>> From: Arınç ÜNAL <arinc.unal@...nc9.com>
>>>>
>>>> LLDP frames are link-local frames, therefore they must be trapped to 
>>>> the
>>>> CPU port. Currently, the MT753X switches treat LLDP frames as regular
>>>> multicast frames, therefore flooding them to user ports. To fix 
>>>> this, set
>>>> LLDP frames to be trapped to the CPU port(s).
>>>>
>>>> The mt753x_bpdu_port_fw enum is universally used for trapping frames,
>>>> therefore rename it and the values in it to mt753x_port_fw.
>>>>
>>>> For MT7530, LLDP frames received from a user port will be trapped to 
>>>> the
>>>> numerically smallest CPU port which is affine to the DSA conduit 
>>>> interface
>>>> that is up.
>>>>
>>>> For MT7531 and the switch on the MT7988 SoC, LLDP frames received 
>>>> from a
>>>> user port will be trapped to the CPU port that is affine to the user 
>>>> port
>>>> from which the frames are received.
>>>>
>>>> The bit for R0E_MANG_FR is 27. When set, the switch regards the 
>>>> frames with
>>>> :0E MAC DA as management (LLDP) frames. This bit is set to 1 after 
>>>> reset on
>>>> MT7530 and MT7531 according to the documents MT7620 Programming 
>>>> Guide v1.0
>>>> and MT7531 Reference Manual for Development Board v1.0, so there's 
>>>> no need
>>>> to deal with this bit. Since there's currently no public document 
>>>> for the
>>>> switch on the MT7988 SoC, I assume this is also the case for this 
>>>> switch.
>>>>
>>>> Fixes: b8f126a8d543 ("net-next: dsa: add dsa support for Mediatek 
>>>> MT7530 switch")
>>>
>>>
>>> Patch 4 claims to be a fix for this commit, and introduces one of these
>>> modifications to MT753X_BPC, which this patch then changes.
>>
>> Let me chime in on this one, as mentioned by Arinç, I am one of the
>> requesters of having this patch (and patch 4).
>> Patch 4 enables the trapping of BPDU's to the CPU, being STP (Spanning
>> Tree) frames. Maybe that should be mentioned, to be clear.
> 
> Sure, I can quote the first sentence on the wikipedia page "Bridge 
> protocol data unit".

I changed my mind. There's no reason to describe BPDUs. The familiar 
reader will know, the unfamiliar reader should just look it up. Like 
Vladimir said, context helps but at the same time, less is more.

Arınç

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