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Message-Id: <20230616181144.646500-6-pankaj.gupta@nxp.com>
Date: Fri, 16 Jun 2023 23:41:42 +0530
From: Pankaj Gupta <pankaj.gupta@....com>
To: robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
conor+dt@...nel.org, shawnguo@...nel.org, s.hauer@...gutronix.de,
kernel@...gutronix.de, festevam@...il.com, linux-imx@....com,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
gaurav.jain@....com, linux-kernel@...r.kernel.org
Cc: Pankaj Gupta <pankaj.gupta@....com>,
Dong Aisheng <aisheng.dong@....com>
Subject: [PATCH v3 5/7] arm64: dts: imx8ulp-evk: reserved mem-ranges to constrain ele-mu dma-range
EdgeLock Enclave are has a hardware limitation of restricted access
to the DDR memory range:
- 0x90000000 - 0xAFFFFFFF
ELE-MU driver requireis 1MB of memory. In this patch the we are reserving
1MB of ddr memory region from the lower 32-bit range.
Signed-off-by: Dong Aisheng <aisheng.dong@....com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@....com>
---
arch/arm64/boot/dts/freescale/imx8ulp-evk.dts | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
index f1c6d933a17c..d2a39e9aa951 100644
--- a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
@@ -19,6 +19,17 @@ memory@...00000 {
device_type = "memory";
reg = <0x0 0x80000000 0 0x80000000>;
};
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ ele_reserved: ele-reserved@...00000 {
+ compatible = "shared-dma-pool";
+ reg = <0 0x90000000 0 0x100000>;
+ no-map;
+ };
+ };
clock_ext_rmii: clock-ext-rmii {
compatible = "fixed-clock";
@@ -53,6 +64,10 @@ &usdhc0 {
status = "okay";
};
+&ele_mu {
+ memory-region = <&ele_reserved>;
+};
+
&fec {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&pinctrl_enet>;
--
2.34.1
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