linux-kernel - [PATCH 3/3] ARM: dts: lan966x: kontron-d10: add PHY interrupts

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Message-Id: <20230616-feature-d10-dt-cleanups-v1-3-50dd0452b8fe@kernel.org>
Date:   Fri, 16 Jun 2023 15:18:41 +0200
From:   Michael Walle <mwalle@...nel.org>
To:     Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Claudiu Beznea <claudiu.beznea@...rochip.com>,
        Nicolas Ferre <nicolas.ferre@...rochip.com>,
        Michael Walle <michael@...le.cc>
Cc:     devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        Michael Walle <mwalle@...nel.org>
Subject: [PATCH 3/3] ARM: dts: lan966x: kontron-d10: add PHY interrupts

With interrupt handling fixed in the MaxLinear PHY driver, see commit
97a89ed101bb ("net: phy: mxl-gpy: disable interrupts on GPY215 by
default"), we can finally add the correct interrupt description to the
device tree.

Signed-off-by: Michael Walle <mwalle@...nel.org>
---
 arch/arm/boot/dts/lan966x-kontron-kswitch-d10-mmt-8g.dts |  2 ++
 arch/arm/boot/dts/lan966x-kontron-kswitch-d10-mmt.dtsi   | 13 +++++++++++++
 2 files changed, 15 insertions(+)

diff --git a/arch/arm/boot/dts/lan966x-kontron-kswitch-d10-mmt-8g.dts b/arch/arm/boot/dts/lan966x-kontron-kswitch-d10-mmt-8g.dts
index 5feef9a59a79..ad5d8b56e6fa 100644
--- a/arch/arm/boot/dts/lan966x-kontron-kswitch-d10-mmt-8g.dts
+++ b/arch/arm/boot/dts/lan966x-kontron-kswitch-d10-mmt-8g.dts
@@ -15,10 +15,12 @@ / {
 &mdio0 {
 	phy2: ethernet-phy@3 {
 		reg = <3>;
+		interrupts-extended = <&gpio 24 IRQ_TYPE_LEVEL_LOW>;
 	};
 
 	phy3: ethernet-phy@4 {
 		reg = <4>;
+		interrupts-extended = <&gpio 24 IRQ_TYPE_LEVEL_LOW>;
 	};
 };
 
diff --git a/arch/arm/boot/dts/lan966x-kontron-kswitch-d10-mmt.dtsi b/arch/arm/boot/dts/lan966x-kontron-kswitch-d10-mmt.dtsi
index 2e16217ac88e..83a1c23887e7 100644
--- a/arch/arm/boot/dts/lan966x-kontron-kswitch-d10-mmt.dtsi
+++ b/arch/arm/boot/dts/lan966x-kontron-kswitch-d10-mmt.dtsi
@@ -49,6 +49,9 @@ spi3: spi@400 {
 };
 
 &gpio {
+	pinctrl-0 = <&phy_int_pins>;
+	pinctrl-names = "default";
+
 	fc3_b_pins: fc3-b-pins {
 		/* SCK, MISO, MOSI */
 		pins = "GPIO_51", "GPIO_52", "GPIO_53";
@@ -61,6 +64,12 @@ miim_c_pins: miim-c-pins {
 		function = "miim_c";
 	};
 
+	phy_int_pins: phy-int-pins {
+		/* PHY_INT# */
+		pins = "GPIO_24";
+		function = "gpio";
+	};
+
 	reset_pins: reset-pins {
 		/* SYS_RST# */
 		pins = "GPIO_56";
@@ -107,21 +116,25 @@ &mdio0 {
 
 	phy4: ethernet-phy@5 {
 		reg = <5>;
+		interrupts-extended = <&gpio 24 IRQ_TYPE_LEVEL_LOW>;
 		coma-mode-gpios = <&gpio 37 GPIO_OPEN_DRAIN>;
 	};
 
 	phy5: ethernet-phy@6 {
 		reg = <6>;
+		interrupts-extended = <&gpio 24 IRQ_TYPE_LEVEL_LOW>;
 		coma-mode-gpios = <&gpio 37 GPIO_OPEN_DRAIN>;
 	};
 
 	phy6: ethernet-phy@7 {
 		reg = <7>;
+		interrupts-extended = <&gpio 24 IRQ_TYPE_LEVEL_LOW>;
 		coma-mode-gpios = <&gpio 37 GPIO_OPEN_DRAIN>;
 	};
 
 	phy7: ethernet-phy@8 {
 		reg = <8>;
+		interrupts-extended = <&gpio 24 IRQ_TYPE_LEVEL_LOW>;
 		coma-mode-gpios = <&gpio 37 GPIO_OPEN_DRAIN>;
 	};
 };

-- 
2.30.2