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Message-Id: <20230616135323.98215-9-radu-nicolae.pirea@oss.nxp.com>
Date: Fri, 16 Jun 2023 16:53:17 +0300
From: "Radu Pirea (NXP OSS)" <radu-nicolae.pirea@....nxp.com>
To: andrew@...n.ch, hkallweit1@...il.com, linux@...linux.org.uk,
davem@...emloft.net, edumazet@...gle.com, kuba@...nel.org,
pabeni@...hat.com, richardcochran@...il.com
Cc: netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
sebastian.tobuschat@....com,
"Radu Pirea (NXP OSS)" <radu-nicolae.pirea@....nxp.com>
Subject: [PATCH net-next v1 08/14] net: phy: nxp-c45-tja11xx: enable LTC sampling on both ext_ts edges
The external trigger configuration for TJA1120 has changed. The PHY
supports sampling of the LTC on rising and on falling edge.
Signed-off-by: Radu Pirea (NXP OSS) <radu-nicolae.pirea@....nxp.com>
---
drivers/net/phy/nxp-c45-tja11xx.c | 64 +++++++++++++++++++++++++++----
1 file changed, 56 insertions(+), 8 deletions(-)
diff --git a/drivers/net/phy/nxp-c45-tja11xx.c b/drivers/net/phy/nxp-c45-tja11xx.c
index 2160b9f8940c..6aa738396daf 100644
--- a/drivers/net/phy/nxp-c45-tja11xx.c
+++ b/drivers/net/phy/nxp-c45-tja11xx.c
@@ -104,6 +104,10 @@
#define VEND1_PTP_CONFIG 0x1102
#define EXT_TRG_EDGE BIT(1)
+#define TJA1120_SYNC_TRIG_FILTER 0x1010
+#define PTP_TRIG_RISE_TS BIT(3)
+#define PTP_TRIG_FALLING_TS BIT(2)
+
#define CLK_RATE_ADJ_LD BIT(15)
#define CLK_RATE_ADJ_DIR BIT(14)
@@ -240,6 +244,7 @@ struct nxp_c45_phy_data {
const struct nxp_c45_phy_stats *stats;
int n_stats;
u8 ptp_clk_period;
+ bool ext_ts_both_edges;
void (*counters_enable)(struct phy_device *phydev);
void (*ptp_init)(struct phy_device *phydev);
void (*ptp_enable)(struct phy_device *phydev, bool enable);
@@ -682,9 +687,52 @@ static int nxp_c45_perout_enable(struct nxp_c45_phy *priv,
return 0;
}
+static void nxp_c45_set_rising_or_falling(struct phy_device *phydev,
+ struct ptp_extts_request *extts)
+{
+ /* Some enable request has only the PTP_ENABLE_FEATURE flag set and in
+ * this case external ts should be enabled on rising edge.
+ */
+ if (extts->flags & PTP_RISING_EDGE ||
+ extts->flags == PTP_ENABLE_FEATURE)
+ phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1,
+ VEND1_PTP_CONFIG, EXT_TRG_EDGE);
+
+ if (extts->flags & PTP_FALLING_EDGE)
+ phy_set_bits_mmd(phydev, MDIO_MMD_VEND1,
+ VEND1_PTP_CONFIG, EXT_TRG_EDGE);
+}
+
+static void nxp_c45_set_rising_and_falling(struct phy_device *phydev,
+ struct ptp_extts_request *extts)
+{
+ /* Some enable request has only the PTP_ENABLE_FEATURE flag set and in
+ * this case external ts should be enabled on rising edge.
+ */
+ if (extts->flags & PTP_RISING_EDGE ||
+ extts->flags == PTP_ENABLE_FEATURE)
+ phy_set_bits_mmd(phydev, MDIO_MMD_VEND1,
+ TJA1120_SYNC_TRIG_FILTER,
+ PTP_TRIG_RISE_TS);
+ else
+ phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1,
+ TJA1120_SYNC_TRIG_FILTER,
+ PTP_TRIG_RISE_TS);
+
+ if (extts->flags & PTP_FALLING_EDGE)
+ phy_set_bits_mmd(phydev, MDIO_MMD_VEND1,
+ TJA1120_SYNC_TRIG_FILTER,
+ PTP_TRIG_FALLING_TS);
+ else
+ phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1,
+ TJA1120_SYNC_TRIG_FILTER,
+ PTP_TRIG_FALLING_TS);
+}
+
static int nxp_c45_extts_enable(struct nxp_c45_phy *priv,
struct ptp_extts_request *extts, int on)
{
+ const struct nxp_c45_phy_data *data = nxp_c45_get_data(priv->phydev);
int pin;
if (extts->flags & ~(PTP_ENABLE_FEATURE |
@@ -695,7 +743,8 @@ static int nxp_c45_extts_enable(struct nxp_c45_phy *priv,
/* Sampling on both edges is not supported */
if ((extts->flags & PTP_RISING_EDGE) &&
- (extts->flags & PTP_FALLING_EDGE))
+ (extts->flags & PTP_FALLING_EDGE) &&
+ !data->ext_ts_both_edges)
return -EOPNOTSUPP;
pin = ptp_find_pin(priv->ptp_clock, PTP_PF_EXTTS, extts->index);
@@ -709,13 +758,10 @@ static int nxp_c45_extts_enable(struct nxp_c45_phy *priv,
return 0;
}
- if (extts->flags & PTP_RISING_EDGE)
- phy_clear_bits_mmd(priv->phydev, MDIO_MMD_VEND1,
- VEND1_PTP_CONFIG, EXT_TRG_EDGE);
-
- if (extts->flags & PTP_FALLING_EDGE)
- phy_set_bits_mmd(priv->phydev, MDIO_MMD_VEND1,
- VEND1_PTP_CONFIG, EXT_TRG_EDGE);
+ if (data->ext_ts_both_edges)
+ nxp_c45_set_rising_and_falling(priv->phydev, extts);
+ else
+ nxp_c45_set_rising_or_falling(priv->phydev, extts);
nxp_c45_gpio_config(priv, pin, GPIO_EXTTS_OUT_CFG);
priv->extts = true;
@@ -1551,6 +1597,7 @@ static const struct nxp_c45_phy_data tja1103_phy_data = {
.stats = tja1103_hw_stats,
.n_stats = ARRAY_SIZE(tja1103_hw_stats),
.ptp_clk_period = PTP_CLK_PERIOD_100BT1,
+ .ext_ts_both_edges = false,
.counters_enable = tja1103_counters_enable,
.ptp_init = tja1103_ptp_init,
.ptp_enable = tja1103_ptp_enable,
@@ -1646,6 +1693,7 @@ static const struct nxp_c45_phy_data tja1120_phy_data = {
.stats = tja1120_hw_stats,
.n_stats = ARRAY_SIZE(tja1120_hw_stats),
.ptp_clk_period = PTP_CLK_PERIOD_1000BT1,
+ .ext_ts_both_edges = true,
.counters_enable = tja1120_counters_enable,
.ptp_init = tja1120_ptp_init,
.ptp_enable = tja1120_ptp_enable,
--
2.34.1
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