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Date:   Sat, 17 Jun 2023 19:20:28 +0200
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Sergio Paracuellos <sergio.paracuellos@...il.com>
Cc:     Shiji Yang <yangshiji66@...look.com>, arinc.unal@...nc9.com,
        devicetree@...r.kernel.org, john@...ozen.org,
        krzysztof.kozlowski+dt@...aro.org, linux-clk@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-mips@...r.kernel.org,
        matthias.bgg@...il.com, mturquette@...libre.com,
        p.zabel@...gutronix.de, robh+dt@...nel.org, sboyd@...nel.org,
        tsbogend@...ha.franken.de
Subject: Re: [PATCH v3 2/9] clk: ralink: add clock and reset driver for MTMIPS
 SoCs

On 17/06/2023 17:37, Sergio Paracuellos wrote:
>>> The case of
>>> searching for compatible is a mess since as you can see in the
>>> bindings there are tons of compatibles to search for, then (this code
>>> is common to all ralink platforms).
>>
>> Compatible is one of the ways using ABI.
> 
> Ok so it is also a broken approach, then.

What is exactly broken approach? Fetching by compatibles? Somehow many
other platforms do not have problem with that, even for multiple
compatibles. Why yours is special?

Anyway, it is not a correct way to get clocks frequency. There is CCF
for this, although maybe Ralink does not support it?

Best regards,
Krzysztof

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