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Message-ID: <20230618-silver-spherical-e7363a9fc3b0@spud>
Date: Sun, 18 Jun 2023 20:16:46 +0100
From: Conor Dooley <conor@...nel.org>
To: Lucas Tanure <tanure@...ux.com>
Cc: Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Neil Armstrong <neil.armstrong@...aro.org>,
Jerome Brunet <jbrunet@...libre.com>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Kevin Hilman <khilman@...libre.com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Nick <nick@...das.com>, Artem <art@...das.com>,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-amlogic@...ts.infradead.org, linux-clk@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-serial@...r.kernel.org
Subject: Re: [PATCH 2/6] dt-bindings: clock: Bindings for Meson T7 clock
controller
On Sun, Jun 18, 2023 at 06:39:17PM +0100, Lucas Tanure wrote:
> On Thu, Jun 15, 2023 at 10:41 PM Conor Dooley <conor@...nel.org> wrote:
> >
> > Hey Lucas,
> >
> > On Thu, Jun 15, 2023 at 07:29:34PM +0100, Lucas Tanure wrote:
> > > Add documentation for T7 the clock controller.
> >
> > Other than the bot's complaint, few comments for ya.
> >
> > > Signed-off-by: Lucas Tanure <tanure@...ux.com>
> > > ---
> > > .../bindings/clock/amlogic,mesont7.yaml | 69 +++
> > > include/dt-bindings/clock/mesont7-clkc.h | 487 ++++++++++++++++++
> > > 2 files changed, 556 insertions(+)
> > > create mode 100644 Documentation/devicetree/bindings/clock/amlogic,mesont7.yaml
> > > create mode 100644 include/dt-bindings/clock/mesont7-clkc.h
> > >
> > > diff --git a/Documentation/devicetree/bindings/clock/amlogic,mesont7.yaml b/Documentation/devicetree/bindings/clock/amlogic,mesont7.yaml
> > > new file mode 100644
> > > index 000000000000..18e7cca0c0e1
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/clock/amlogic,mesont7.yaml
> >
> > The filename should match the compatible - please test the bindings,
> > dt_binding_check will complain.
> >
> > > @@ -0,0 +1,69 @@
> > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > > +%YAML 1.2
> > > +---
> > > +$id: http://devicetree.org/schemas/clock/amlogic,mesont7-clk.yaml#
> >
> > and this should match the filename
> >
> > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > +
> > > +title: Amlogic Meson T7 Clock Controller
> > > +
> > > +maintainers:
> > > + - Lucas Tanure <tanure@...ux.com>
> > > +
> > > +description: |
> > > + The Amlogic Meson T7 clock controller generates and supplies clock to
> > > + various peripherals within the SoC.
> > > +
> > > + This binding uses common clock bindings
> > > + [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
> >
> > This doesn't add anything as you're adding a yaml binding. I'd drop it
> > (and the | from description: since you would no longer have formatting
> > to preserve).
> >
> > > +
> > > +properties:
> > > + compatible:
> > > + const: amlogic,t7-clkc
> > > +
> > > + reg:
> > > + items:
> > > + - description: basic registers
> >
> > What does "basic registers" mean? I think you should be more specific in
> > your description.
> >
> > > + - description: pll registers
> > > + - description: cpu_clk registers
> > > +
> > > + reg-names:
> > > + items:
> > > + - const: basic
> > > + - const: pll
> > > + - const: cpu_clk
> > > +
> > > + clocks:
> > > + maxItems: 1
> > > +
> > > + clock-names:
> > > + const: xtal
> > > +
> > > + '#clock-cells':
> > > + const: 1
> > > +
> > > +required:
> > > + - compatible
> > > + - reg
> > > + - reg-names
> > > + - clocks
> > > + - clock-names
> > > + - '#clock-cells'
> > > +
> > > +additionalProperties: false
> > > +
> > > +examples:
> > > + # Clock controller node:
> > > + - |
> > > + clkc: clock-controller {
> >
> > The comment above and the node name here can be dropped.
> > You do however need to change "clock-controller" to
> > "clock-controller@<addr>".
> >
> > > + compatible = "amlogic,t7-clkc";
> > > + #clock-cells = <1>;
> > > + reg = <0x0 0x0000 0x00 0x49c>,
> > > + <0x0 0x8000 0x00 0x320>,
> > > + <0x0 0xe040 0x00 0x0bc>;
> >
> > Drop the 0x0 stuff from here.
> >
> > > + reg-names = "basic", "pll", "cpu_clk";
> > > + clocks = <&xtal>;
> > > + clock-names = "xtal";
> > > + status = "okay";
> >
> > status can be dropped, okay is the default.
> >
> > Cheers,
> > Conor.
> >
> I will drop this patch for now, wait for the S4 clock driver to be
> upstreamed, and use that as a base.
Why? Is the t7-clkc IP the same or very similar to the S4?
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