Message-Id: <2A9DA240-CEEC-48D3-9B3F-48AB3AF8302A@goldelico.com>
Date:   Mon, 19 Jun 2023 06:42:50 +0200
From:   "H. Nikolaus Schaller" <hns@...delico.com>
To:     Paul Cercueil <paul@...pouillou.net>
Cc:     list@...ndingux.net, Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
        Conor Dooley <conor+dt@...nel.org>, linux-mips@...r.kernel.org,
        Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
        Paul Boddie <paul@...die.org.uk>,
        Paul Burton <paulburton@...nel.org>,
        Christophe Branchereau <cbranchereau@...il.com>
Subject: Re: [PATCH 0/9] MIPS: CI20: Add WiFi / Bluetooth support

Hi Paul,

> Am 18.06.2023 um 15:58 schrieb Paul Cercueil <paul@...pouillou.net>:
> 
> Hi All,
> 
> [...]
> 
>> Looking at the JZ4780_DS.PDF file, the SoC actually wants 1.1V so the
>> DT is not wrong - in theory. But in practice it does not work, as you
>> experienced yourself. However, if the ACT8600 defaults to 1.2V, or if
>> the bootloader configures it to 1.2V, I would think that this is
>> actually a voltage that the SoC can handle - otherwise the SoC would
>> be
>> overvolted until the kernel starts, and the board design would be
>> flawed.
>> 
>> I measured that the old 3.x kernel keeps the SoC voltage at 1.2V, so
>> it
>> sounds like a better default. Therefore the fix here would be to
>> raise
>> the DCDC1 regulator to 1.2V.
>> 
>> I'll send a patch later today.
> 
> After a talk with Christophe (Cc'd), I changed my mind.
> 
> A +100 mV overvolt is a *huge* step up, and although the SoC doesn't
> burst into flames, it could very well reduce its life span.

Well, 1.2V is still within the recommended and absolute limits. See my
previous mail. And it appears that my board simply did run at 1.2V
since I bought it many years ago...

So it should neither burn nor burst into flames since it is no change
at least for my board :)

Anyways running at the lowest possible voltage would be good.
The question is if the driver should enforce this more than e.g. U-Boot.

> 
> I used to have huge stability issues (kernel not booting to userspace
> half the times, or just plain reboots after a few minutes of uptime)

That is exactly what I see with the new 1.10V.

> and I now realize it's because I was running the core at 1.1V, because
> these issues disappeared the moment I switched to 1.2V.

For me as well (and I had 1.2V over the past years).

> 
> However, I am now running at 1.125 volts, which is just 25mV above the
> nominal voltage - and it's been extremely stable so far.

Well, what also could be is that the transient of changing the voltage
from the default 1.20V (it either gets from U-Boot or a preprogrammed
chip setting) to the new 1.1V voltage gives an undershoot.

I remember that I studied the OMAP OPP and dynamic voltage scaling control
some years ago and there it was very critical that voltages and clock
frequencies are changed in a specific sequence and with some delays.

And for the OMAP5 we did find a band within the permitted range where
everything was fine and spurious kernel issues (sudden illegal instructions
or segfaults) outside. The result was that there was a minimum voltage
for low frequencies higher than the maximum voltage for higher frequencies.
So there was not even a single core voltage that could support all
clock frequencies.

> 
> Nikolaus: could you test at 1.125 volts? If it's stable for you as
> well, I'd suggest to use this as the new default.

Yes, this is a good idea!

Especially as there are wires between the regulator output inside
the act chip and the core. There may be a small voltage drop so
that setting 1.10V may be too low and 1.25V may end up in real
1.1V.

> 
> Paul (Burton): As you wrote most of the drivers (and uboot?) for the
> board, do you know why VDDCORE was set to 1.2V?
> 
> Cheers,
> -Paul

Best regards,
Nikolaus

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