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Date:   Mon, 19 Jun 2023 10:12:56 +0200
From:   "Arnd Bergmann" <arnd@...db.de>
To:     "Jacky Huang" <ychuang570808@...il.com>,
        "Rob Herring" <robh+dt@...nel.org>,
        krzysztof.kozlowski+dt@...aro.org, "Lee Jones" <lee@...nel.org>,
        "Michael Turquette" <mturquette@...libre.com>,
        "Stephen Boyd" <sboyd@...nel.org>,
        "Philipp Zabel" <p.zabel@...gutronix.de>,
        "Greg Kroah-Hartman" <gregkh@...uxfoundation.org>,
        "Jiri Slaby" <jirislaby@...nel.org>,
        "Tomer Maimon" <tmaimon77@...il.com>,
        "Catalin Marinas" <catalin.marinas@....com>,
        "Will Deacon" <will@...nel.org>
Cc:     devicetree@...r.kernel.org, linux-clk@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-serial@...r.kernel.org, soc@...nel.org, schung@...oton.com,
        mjchen@...oton.com, "Jacky Huang" <ychuang3@...oton.com>,
        "Krzysztof Kozlowski" <krzysztof.kozlowski@...aro.org>
Subject: Re: [PATCH v15 2/2] clk: nuvoton: Add clock driver for ma35d1 clock controller

On Mon, Jun 19, 2023, at 05:30, Jacky Huang wrote:
> From: Jacky Huang <ychuang3@...oton.com>
>
> The clock controller generates clocks for the whole chip, including
> system clocks and all peripheral clocks. This driver support ma35d1
> clock gating, divider, and individual PLL configuration.
>
> There are 6 PLLs in ma35d1 SoC:
>   - CA-PLL for the two Cortex-A35 CPU clock
>   - SYS-PLL for system bus, which comes from the companion MCU
>     and cannot be programmed by clock controller.
>   - DDR-PLL for DDR
>   - EPLL for GMAC and GFX, Display, and VDEC IPs.
>   - VPLL for video output pixel clock
>   - APLL for SDHC, I2S audio, and other IPs.
> CA-PLL has only one operation mode.
> DDR-PLL, EPLL, VPLL, and APLL are advanced PLLs which have 3
> operation modes: integer mode, fraction mode, and spread specturm mode.
>
> Signed-off-by: Jacky Huang <ychuang3@...oton.com>
> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>

Hi Jacky,

Since I have already picked up the previous version of this patch,
please send a diff against the version I merged please.

     Arnd

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