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Message-ID: <75cf8335-af1f-e06c-c770-b2b540e812ed@ventanamicro.com>
Date: Tue, 20 Jun 2023 13:37:00 -0600
From: Jeff Law <jlaw@...tanamicro.com>
To: Palmer Dabbelt <palmer@...belt.com>,
Conor Dooley <conor@...nel.org>
Cc: heiko@...ech.de, Paul Walmsley <paul.walmsley@...ive.com>,
aou@...s.berkeley.edu, herbert@...dor.apana.org.au,
davem@...emloft.net, Conor Dooley <conor.dooley@...rochip.com>,
linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-crypto@...r.kernel.org, christoph.muellner@...ll.eu,
heiko.stuebner@...ll.eu
Subject: Re: [PATCH v5 1/4] RISC-V: add Zbc extension detection
On 6/20/23 13:09, Palmer Dabbelt wrote:
> On Mon, 12 Jun 2023 14:31:14 PDT (-0700), Conor Dooley wrote:
>> Hey Heiko,
>>
>> On Mon, Jun 12, 2023 at 11:04:39PM +0200, Heiko Stuebner wrote:
>>> From: Heiko Stuebner <heiko.stuebner@...ll.eu>
>>>
>>> Add handling for Zbc extension.
>>>
>>> Zbc provides instruction for carry-less multiplication.
>>>
>>> Signed-off-by: Heiko Stuebner <heiko.stuebner@...ll.eu>
>>> ---
>>> arch/riscv/Kconfig | 22 ++++++++++++++++++++++
>>> arch/riscv/include/asm/hwcap.h | 1 +
>>> arch/riscv/kernel/cpu.c | 1 +
>>> arch/riscv/kernel/cpufeature.c | 1 +
>>> 4 files changed, 25 insertions(+)
>>
>> Plumbing into the hwprobe stuff would be nice, but that's not a
>> requirement for getting stuff merged :)
>
> IIRC we talked about this on IRC, but IMO we shouldn't require something
> be user visible for it to be merged in the kernel.
Note that exposing Zbc is potentially useful. We've got GCC and LLVM
code that can detect and rewrite a bitwise CRC into clmul.
Jeff
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