Message-ID: <ZJLAa5AdJfHNJyPv@sunil-laptop>
Date:   Wed, 21 Jun 2023 14:48:35 +0530
From:   Sunil V L <sunilvl@...tanamicro.com>
To:     Song Shuai <songshuaishuai@...ylab.org>
Cc:     Alexandre Ghiti <alexghiti@...osinc.com>,
        Jonathan Corbet <corbet@....net>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Palmer Dabbelt <palmer@...belt.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        Conor Dooley <conor.dooley@...rochip.com>,
        linux-doc@...r.kernel.org, linux-riscv@...ts.infradead.org,
        linux-kernel@...r.kernel.org,
        Björn Töpel <bjorn@...osinc.com>
Subject: Re: [PATCH v2 2/3] Documentation: riscv: Add early boot document

On Wed, Jun 21, 2023 at 04:15:07PM +0800, Song Shuai wrote:
> 
> 
> 在 2023/6/21 15:22, Alexandre Ghiti 写道:
> > This document describes the constraints and requirements of the early
> > boot process in a RISC-V kernel.
> > 
> > Signed-off-by: Alexandre Ghiti <alexghiti@...osinc.com>
> > Reviewed-by: Björn Töpel <bjorn@...osinc.com>
> > ---
> >   Documentation/riscv/boot-image-header.rst |   3 -
> >   Documentation/riscv/boot.rst              | 170 ++++++++++++++++++++++
> >   Documentation/riscv/index.rst             |   1 +
> >   3 files changed, 171 insertions(+), 3 deletions(-)
> >   create mode 100644 Documentation/riscv/boot.rst
> > 
> > diff --git a/Documentation/riscv/boot-image-header.rst b/Documentation/riscv/boot-image-header.rst
> > index d7752533865f..a4a45310c4c4 100644
> > --- a/Documentation/riscv/boot-image-header.rst
> > +++ b/Documentation/riscv/boot-image-header.rst
> > @@ -7,9 +7,6 @@ Boot image header in RISC-V Linux
> >   This document only describes the boot image header details for RISC-V Linux.
> > -TODO:
> > -  Write a complete booting guide.
> > -
> >   The following 64-byte header is present in decompressed Linux kernel image::
> >   	u32 code0;		  /* Executable code */
> > diff --git a/Documentation/riscv/boot.rst b/Documentation/riscv/boot.rst
> > new file mode 100644
> > index 000000000000..019ee818686d
> > --- /dev/null
> > +++ b/Documentation/riscv/boot.rst
> > @@ -0,0 +1,170 @@
> > +.. SPDX-License-Identifier: GPL-2.0
> > +
> > +===============================================
> > +RISC-V Kernel Boot Requirements and Constraints
> > +===============================================
> > +
> > +:Author: Alexandre Ghiti <alexghiti@...osinc.com>
> > +:Date: 23 May 2023
> > +
> > +This document describes what the RISC-V kernel expects from bootloaders and
> > +firmware, but also the constraints that any developer must have in mind when
> > +touching the early boot process. For the purposes of this document, the
> > +'early boot process' refers to any code that runs before the final virtual
> > +mapping is set up.
> > +
> > +Pre-kernel Requirements and Constraints
> > +=======================================
> > +
> > +The RISC-V kernel expects the following of bootloaders and platform firmware:
> > +
> > +Register state
> > +--------------
> > +
> > +The RISC-V kernel expects:
> > +
> > +  * `$a0` to contain the hartid of the current core.
> > +  * `$a1` to contain the address of the devicetree in memory.
> > +
> > +CSR state
> > +---------
> > +
> > +The RISC-V kernel expects:
> > +
> > +  * `$satp = 0`: the MMU, if present, must be disabled.
> > +
> > +Reserved memory for resident firmware
> > +-------------------------------------
> > +
> > +The RISC-V kernel must not map any resident memory, or memory protected with
> > +PMPs, in the direct mapping, so the firmware must correctly mark those regions
> > +as per the devicetree specification and/or the UEFI specification.
> > +
> > +Kernel location
> > +---------------
> > +
> > +The RISC-V kernel expects to be placed at a PMD boundary (2MB aligned for rv64
> > +and 4MB aligned for rv32). Note that the EFI stub will physically relocate the
> > +kernel if that's not the case.
> > +
> > +Hardware description
> > +--------------------
> > +
> > +The firmware can pass either a devicetree or ACPI tables to the RISC-V kernel.
> > +
> > +The devicetree is either passed directly to the kernel from the previous stage
> > +using the `$a1` register, or when booting with UEFI, it can be passed using the
> > +EFI configuration table.
> > +
> > +The ACPI tables are passed to the kernel using the EFI configuration table. In
> > +this case, a tiny devicetree is still created by the EFI stub. Please refer to
> > +"EFI stub and devicetree" tree section below for details about this devicetree.
> > +
> > +Kernel entrance
> > +---------------
> > +
> > +On SMP systems, there are 2 methods to enter the kernel:
> > +
> > +- `RISCV_BOOT_SPINWAIT`: the firmware releases all harts in the kernel, one hart
> > +  wins a lottery and executes the early boot code while the other harts are
> > +  parked waiting for the initialization to finish. This method is mostly used to
> > +  support older firmwares without SBI HSM extension and M-mode RISC-V kernel.
> > +- `Ordered booting`: the firmware releases only one hart that will execute the
> > +  initialization phase and then will start all other harts using the SBI HSM
> > +  extension. The ordered booting method is the preferred booting method for
> > +  booting the RISC-V kernel because it can support cpu hotplug and kexec.
> > +
> > +UEFI
> > +----
> > +
> > +UEFI memory map
> > +~~~~~~~~~~~~~~~
> > +
> > +When booting with UEFI, the RISC-V kernel will use only the EFI memory map to
> > +populate the system memory.
> > +
> > +The UEFI firmware must parse the subnodes of the `/reserved-memory` devicetree
> > +node and abide by the devicetree specification to convert the attributes of
> > +those subnodes (`no-map` and `reusable`) into their correct EFI equivalent
> > +(refer to section "3.5.4 /reserved-memory and UEFI" of the devicetree
> > +specification v0.4-rc1).
> append this note ?
> 
> Note that RISC-V edk2 diverges from the devicetree specification to declare
> the !no-map regions as EfiReservedMemoryType instead of EfiBootServicesData.
> > +
Not required. It will be fixed in EDK2.

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