linux-kernel - Re: [PATCH V7 16/23] mmc: sdhci-uhs2: add clock operations

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Message-ID: <CAK00qKDVU5_JF4kBAM2dwj55n35KhJQWr0AAQ_hghJcFBwPLsw@mail.gmail.com>
Date:   Wed, 21 Jun 2023 18:29:43 +0800
From:   Victor Shih <victorshihgli@...il.com>
To:     Adrian Hunter <adrian.hunter@...el.com>
Cc:     ulf.hansson@...aro.org, linux-mmc@...r.kernel.org,
        linux-kernel@...r.kernel.org, benchuanggli@...il.com,
        HL.Liu@...esyslogic.com.tw, Greg.tu@...esyslogic.com.tw,
        takahiro.akashi@...aro.org, dlunev@...omium.org,
        Victor Shih <victor.shih@...esyslogic.com.tw>,
        Ben Chuang <ben.chuang@...esyslogic.com.tw>
Subject: Re: [PATCH V7 16/23] mmc: sdhci-uhs2: add clock operations

Hi, Adrian

On Wed, Apr 12, 2023 at 9:13 PM Adrian Hunter <adrian.hunter@...el.com> wrote:
>
> On 31/03/23 13:55, Victor Shih wrote:
> > This is a sdhci version of mmc's uhs2_[enable|disable]_clk operations.
> >
> > Signed-off-by: Ben Chuang <ben.chuang@...esyslogic.com.tw>
> > Signed-off-by: AKASHI Takahiro <takahiro.akashi@...aro.org>
> > Signed-off-by: Victor Shih <victor.shih@...esyslogic.com.tw>
> > ---
> >  drivers/mmc/host/sdhci-uhs2.c | 32 ++++++++++++++++++++++++++++++++
> >  1 file changed, 32 insertions(+)
> >
> > diff --git a/drivers/mmc/host/sdhci-uhs2.c b/drivers/mmc/host/sdhci-uhs2.c
> > index e2972be1889f..71ac76065886 100644
> > --- a/drivers/mmc/host/sdhci-uhs2.c
> > +++ b/drivers/mmc/host/sdhci-uhs2.c
> > @@ -14,6 +14,7 @@
> >  #include <linux/module.h>
> >  #include <linux/iopoll.h>
> >  #include <linux/bitfield.h>
> > +#include <linux/ktime.h>
>
> There is no ktime in this patch
>

I will update it to the V8 version.

> >
> >  #include "sdhci.h"
> >  #include "sdhci-uhs2.h"
> > @@ -328,6 +329,37 @@ static int sdhci_uhs2_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
> >       return 0;
> >  }
> >
> > +static int sdhci_uhs2_disable_clk(struct mmc_host *mmc)
> > +{
> > +     struct sdhci_host *host = mmc_priv(mmc);
> > +     u16 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
> > +
> > +     clk &= ~SDHCI_CLOCK_CARD_EN;
> > +     sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
> > +
> > +     return 0;
> > +}
> > +
> > +static int sdhci_uhs2_enable_clk(struct mmc_host *mmc)
> > +{
> > +     struct sdhci_host *host = mmc_priv(mmc);
> > +     u16 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
> > +     u32 val;
> > +     /* 20ms */
> > +     int timeout_us = 20000;
>
> Let's put the comment on the end and put the lines in
> descending line length i.e.
>
>         int timeout_us = 20000; /* 20ms */
>         u32 val;
>

I will update it to the V8 version.

> > +
> > +     clk |= SDHCI_CLOCK_CARD_EN;
> > +     sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
> > +
> > +     if (read_poll_timeout_atomic(sdhci_readw, val, (val & SDHCI_CLOCK_INT_STABLE),
> > +                                  10, timeout_us, true, host, SDHCI_CLOCK_CONTROL)) {
>
> atomic does not seem to be needed here
>

I will update it to the V8 version.

> > +             pr_err("%s: Internal clock never stabilised.\n", mmc_hostname(host->mmc));
> > +             sdhci_dumpregs(host);
> > +             return 1;
>
>                 return -EIO;
>

I will update it to the V8 version.

> > +     }
> > +     return 0;
> > +}
> > +
> >  /*****************************************************************************\
> >   *                                                                           *
> >   * Driver init/exit                                                          *
>

Thanks, Victor Shih