| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <ZJPzwj1odaC8fFzO@nanopsycho>
Date: Thu, 22 Jun 2023 09:09:54 +0200
From: Jiri Pirko <jiri@...nulli.us>
To: "Kubalewski, Arkadiusz" <arkadiusz.kubalewski@...el.com>
Cc: Jakub Kicinski <kuba@...nel.org>,
"vadfed@...a.com" <vadfed@...a.com>,
"jonathan.lemon@...il.com" <jonathan.lemon@...il.com>,
"pabeni@...hat.com" <pabeni@...hat.com>,
"corbet@....net" <corbet@....net>,
"davem@...emloft.net" <davem@...emloft.net>,
"edumazet@...gle.com" <edumazet@...gle.com>,
"vadfed@...com" <vadfed@...com>,
"Brandeburg, Jesse" <jesse.brandeburg@...el.com>,
"Nguyen, Anthony L" <anthony.l.nguyen@...el.com>,
"M, Saeed" <saeedm@...dia.com>,
"leon@...nel.org" <leon@...nel.org>,
"richardcochran@...il.com" <richardcochran@...il.com>,
"sj@...nel.org" <sj@...nel.org>,
"javierm@...hat.com" <javierm@...hat.com>,
"ricardo.canuelo@...labora.com" <ricardo.canuelo@...labora.com>,
"mst@...hat.com" <mst@...hat.com>,
"tzimmermann@...e.de" <tzimmermann@...e.de>,
"Michalik, Michal" <michal.michalik@...el.com>,
"gregkh@...uxfoundation.org" <gregkh@...uxfoundation.org>,
"jacek.lawrynowicz@...ux.intel.com"
<jacek.lawrynowicz@...ux.intel.com>,
"airlied@...hat.com" <airlied@...hat.com>,
"ogabbay@...nel.org" <ogabbay@...nel.org>,
"arnd@...db.de" <arnd@...db.de>,
"nipun.gupta@....com" <nipun.gupta@....com>,
"axboe@...nel.dk" <axboe@...nel.dk>,
"linux@...y.sk" <linux@...y.sk>,
"masahiroy@...nel.org" <masahiroy@...nel.org>,
"benjamin.tissoires@...hat.com" <benjamin.tissoires@...hat.com>,
"geert+renesas@...der.be" <geert+renesas@...der.be>,
"Olech, Milena" <milena.olech@...el.com>,
"kuniyu@...zon.com" <kuniyu@...zon.com>,
"liuhangbin@...il.com" <liuhangbin@...il.com>,
"hkallweit1@...il.com" <hkallweit1@...il.com>,
"andy.ren@...cruise.com" <andy.ren@...cruise.com>,
"razor@...ckwall.org" <razor@...ckwall.org>,
"idosch@...dia.com" <idosch@...dia.com>,
"lucien.xin@...il.com" <lucien.xin@...il.com>,
"nicolas.dichtel@...nd.com" <nicolas.dichtel@...nd.com>,
"phil@....cc" <phil@....cc>,
"claudiajkang@...il.com" <claudiajkang@...il.com>,
"linux-doc@...r.kernel.org" <linux-doc@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
"intel-wired-lan@...ts.osuosl.org" <intel-wired-lan@...ts.osuosl.org>,
"linux-rdma@...r.kernel.org" <linux-rdma@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>, poros <poros@...hat.com>,
mschmidt <mschmidt@...hat.com>,
"linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
"vadim.fedorenko@...ux.dev" <vadim.fedorenko@...ux.dev>
Subject: Re: [RFC PATCH v8 03/10] dpll: core: Add DPLL framework base
functions
Wed, Jun 21, 2023 at 11:17:26PM CEST, arkadiusz.kubalewski@...el.com wrote:
>>From: Jakub Kicinski <kuba@...nel.org>
>>Sent: Tuesday, June 13, 2023 1:45 AM
>>
>>On Fri, 9 Jun 2023 14:18:46 +0200 Arkadiusz Kubalewski wrote:
>>> + xa_for_each(xa_pins, i, ref) {
>>> + if (ref->pin != pin)
>>> + continue;
>>> + reg = dpll_pin_registration_find(ref, ops, priv);
>>> + if (reg) {
>>> + refcount_inc(&ref->refcount);
>>> + return 0;
>>> + }
>>> + ref_exists = true;
>>> + break;
>>> + }
>>> +
>>> + if (!ref_exists) {
>>> + ref = kzalloc(sizeof(*ref), GFP_KERNEL);
>>> + if (!ref)
>>> + return -ENOMEM;
>>> + ref->pin = pin;
>>> + INIT_LIST_HEAD(&ref->registration_list);
>>> + ret = xa_insert(xa_pins, pin->pin_idx, ref, GFP_KERNEL);
>>> + if (ret) {
>>> + kfree(ref);
>>> + return ret;
>>> + }
>>> + refcount_set(&ref->refcount, 1);
>>> + }
>>> +
>>> + reg = kzalloc(sizeof(*reg), GFP_KERNEL);
>>
>>Why do we have two structures - ref and reg?
>>
>
>Thank to Jiri and reg struct we solved a pin/dpll association
>with multiple device drivers..
Multiple instances of the same driver.
>I.e. for pin:
>
>struct dpll_pin_registration {
> struct list_head list;
> const struct dpll_pin_ops *ops;
> void *priv;
>};
>
>struct dpll_pin_ref {
> union {
> struct dpll_device *dpll;
> struct dpll_pin *pin;
> };
> struct list_head registration_list;
> refcount_t refcount;
>};
>
>struct dpll_pin {
> u32 id;
> u32 pin_idx;
> u64 clock_id;
> struct module *module;
> struct xarray dpll_refs;
> struct xarray parent_refs;
> const struct dpll_pin_properties *prop;
> char *rclk_dev_name;
> refcount_t refcount;
>};
>
>Basically, a pin or a device can be registered from multiple drivers,
Again, multiple instances of the same driver.
>where each driver has own priv and ops.
Each instance/device.
>A single dpll_pin has references to dplls or pins (dpll_refs/parent_refs)
>it is connected with, and thanks to registration list single reference can
>have multiple drivers being attached with a particular dpll/pin.
Multiple instances/devices.
In case of mlx5, the same dpll device and same dpll pin could be shared
among two PFs but also among multiple VFs and SFs. They all share the
same clock, same dpll device.
>
>The same scheme is for a dpll_device struct and associated pins.
>
>
>>> + if (!reg) {
>>> + if (!ref_exists)
>>> + kfree(ref);
>>
>>ref has already been inserted into xa_pins
>>
>
>True, seems like a bug, will fix it.
>
>Thank you,
>Arkadiusz
>
>>> + return -ENOMEM;
Powered by blists - more mailing lists