linux-kernel - Re: [PATCH 1/1] net: axienet: Move reset before DMA detection

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Message-ID: <ZJQFhYGeYATpZB6B@nanopsycho>
Date:   Thu, 22 Jun 2023 10:25:41 +0200
From:   Jiri Pirko <jiri@...nulli.us>
To:     Maxim Kochetkov <fido_max@...ox.ru>
Cc:     netdev@...r.kernel.org,
        Radhey Shyam Pandey <radhey.shyam.pandey@....com>,
        "David S. Miller" <davem@...emloft.net>,
        Eric Dumazet <edumazet@...gle.com>,
        Jakub Kicinski <kuba@...nel.org>,
        Paolo Abeni <pabeni@...hat.com>,
        Michal Simek <michal.simek@....com>,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/1] net: axienet: Move reset before DMA detection

Wed, Jun 21, 2023 at 01:26:30PM CEST, fido_max@...ox.ru wrote:
>DMA detection will fail if axinet was started before (by boot loader,
>boot ROM, etc). In this state axinet will not start properly.
>So move axinet reset before DMA detection.
>
>Signed-off-by: Maxim Kochetkov <fido_max@...ox.ru>

You are missing a "Fixes:" tag here pointing out to the patch that
introduced the issue.


>---
> drivers/net/ethernet/xilinx/xilinx_axienet_main.c | 10 +++++-----
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
>diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
>index 3e310b55bce2..734822321e0a 100644
>--- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
>+++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
>@@ -2042,6 +2042,11 @@ static int axienet_probe(struct platform_device *pdev)
> 		goto cleanup_clk;
> 	}
> 
>+	/* Reset core now that clocks are enabled, prior to accessing MDIO */
>+	ret = __axienet_device_reset(lp);
>+	if (ret)
>+		goto cleanup_clk;
>+
> 	/* Autodetect the need for 64-bit DMA pointers.
> 	 * When the IP is configured for a bus width bigger than 32 bits,
> 	 * writing the MSB registers is mandatory, even if they are all 0.
>@@ -2096,11 +2101,6 @@ static int axienet_probe(struct platform_device *pdev)
> 	lp->coalesce_count_tx = XAXIDMA_DFT_TX_THRESHOLD;
> 	lp->coalesce_usec_tx = XAXIDMA_DFT_TX_USEC;
> 
>-	/* Reset core now that clocks are enabled, prior to accessing MDIO */
>-	ret = __axienet_device_reset(lp);
>-	if (ret)
>-		goto cleanup_clk;
>-
> 	ret = axienet_mdio_setup(lp);
> 	if (ret)
> 		dev_warn(&pdev->dev,
>-- 
>2.40.1
>
>