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Message-ID: <1687433656-7892-2-git-send-email-spujar@nvidia.com>
Date: Thu, 22 Jun 2023 17:04:09 +0530
From: Sameer Pujar <spujar@...dia.com>
To: <broonie@...nel.org>, <robh+dt@...nel.org>, <krzk+dt@...nel.org>,
<thierry.reding@...il.com>, <lgirdwood@...il.com>,
<perex@...ex.cz>, <tiwai@...e.com>
CC: <jonathanh@...dia.com>, <mkumard@...dia.com>, <sheetal@...dia.com>,
<alsa-devel@...a-project.org>, <devicetree@...r.kernel.org>,
<linux-tegra@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<stable@...r.kernel.org>
Subject: [PATCH 1/8] ASoC: tegra: Fix SFC conversion for few rates
From: Sheetal <sheetal@...dia.com>
Sample rate conversions for rates greater than 48kHz are found to be
failing. It means x->y conversions fail when either x or y is greater
than 48kHz.
This happens because, tegra210_sfc_rate_to_idx() returns incorrect
index for rates greater than 48kHz. This actually depends on the
tegra210_sfc_rates[] array and it is not in sync with frequency
values of SFC TX/RX register. To be precise, 64kHz entry is missing
in above array defined in the driver. Due to this wrong index is
returned and this results in incorrect programming of coefficients.
To fix this, align the tegra210_sfc_rates[] array with SFC register
specification and thus add 64kHz entry to it. Also, the coefficient
table is updated to reflect that none of the conversions are supported
for 64kHz.
Fixes: b2f74ec53a6c ("ASoC: tegra: Add Tegra210 based SFC driver")
Cc: stable@...r.kernel.org
Signed-off-by: Sheetal <sheetal@...dia.com>
Reviewed-by: Mohan Kumar D <mkumard@...dia.com>
Reviewed-by: Sameer Pujar <spujar@...dia.com>
---
sound/soc/tegra/tegra210_sfc.c | 31 ++++++++++++++++++++++++++++++-
sound/soc/tegra/tegra210_sfc.h | 4 ++--
2 files changed, 32 insertions(+), 3 deletions(-)
diff --git a/sound/soc/tegra/tegra210_sfc.c b/sound/soc/tegra/tegra210_sfc.c
index e9df1ff..c2240bab 100644
--- a/sound/soc/tegra/tegra210_sfc.c
+++ b/sound/soc/tegra/tegra210_sfc.c
@@ -2,7 +2,7 @@
//
// tegra210_sfc.c - Tegra210 SFC driver
//
-// Copyright (c) 2021 NVIDIA CORPORATION. All rights reserved.
+// Copyright (c) 2021-2023 NVIDIA CORPORATION. All rights reserved.
#include <linux/clk.h>
#include <linux/device.h>
@@ -42,6 +42,7 @@ static const int tegra210_sfc_rates[TEGRA210_SFC_NUM_RATES] = {
32000,
44100,
48000,
+ 64000,
88200,
96000,
176400,
@@ -2857,6 +2858,7 @@ static s32 *coef_addr_table[TEGRA210_SFC_NUM_RATES][TEGRA210_SFC_NUM_RATES] = {
coef_8to32,
coef_8to44,
coef_8to48,
+ UNSUPP_CONV,
coef_8to88,
coef_8to96,
UNSUPP_CONV,
@@ -2872,6 +2874,7 @@ static s32 *coef_addr_table[TEGRA210_SFC_NUM_RATES][TEGRA210_SFC_NUM_RATES] = {
coef_11to32,
coef_11to44,
coef_11to48,
+ UNSUPP_CONV,
coef_11to88,
coef_11to96,
UNSUPP_CONV,
@@ -2887,6 +2890,7 @@ static s32 *coef_addr_table[TEGRA210_SFC_NUM_RATES][TEGRA210_SFC_NUM_RATES] = {
coef_16to32,
coef_16to44,
coef_16to48,
+ UNSUPP_CONV,
coef_16to88,
coef_16to96,
coef_16to176,
@@ -2902,6 +2906,7 @@ static s32 *coef_addr_table[TEGRA210_SFC_NUM_RATES][TEGRA210_SFC_NUM_RATES] = {
coef_22to32,
coef_22to44,
coef_22to48,
+ UNSUPP_CONV,
coef_22to88,
coef_22to96,
coef_22to176,
@@ -2917,6 +2922,7 @@ static s32 *coef_addr_table[TEGRA210_SFC_NUM_RATES][TEGRA210_SFC_NUM_RATES] = {
coef_24to32,
coef_24to44,
coef_24to48,
+ UNSUPP_CONV,
coef_24to88,
coef_24to96,
coef_24to176,
@@ -2932,6 +2938,7 @@ static s32 *coef_addr_table[TEGRA210_SFC_NUM_RATES][TEGRA210_SFC_NUM_RATES] = {
BYPASS_CONV,
coef_32to44,
coef_32to48,
+ UNSUPP_CONV,
coef_32to88,
coef_32to96,
coef_32to176,
@@ -2947,6 +2954,7 @@ static s32 *coef_addr_table[TEGRA210_SFC_NUM_RATES][TEGRA210_SFC_NUM_RATES] = {
coef_44to32,
BYPASS_CONV,
coef_44to48,
+ UNSUPP_CONV,
coef_44to88,
coef_44to96,
coef_44to176,
@@ -2962,11 +2970,28 @@ static s32 *coef_addr_table[TEGRA210_SFC_NUM_RATES][TEGRA210_SFC_NUM_RATES] = {
coef_48to32,
coef_48to44,
BYPASS_CONV,
+ UNSUPP_CONV,
coef_48to88,
coef_48to96,
coef_48to176,
coef_48to192,
},
+ /* Convertions from 64 kHz */
+ {
+ UNSUPP_CONV,
+ UNSUPP_CONV,
+ UNSUPP_CONV,
+ UNSUPP_CONV,
+ UNSUPP_CONV,
+ UNSUPP_CONV,
+ UNSUPP_CONV,
+ UNSUPP_CONV,
+ UNSUPP_CONV,
+ UNSUPP_CONV,
+ UNSUPP_CONV,
+ UNSUPP_CONV,
+ UNSUPP_CONV,
+ },
/* Convertions from 88.2 kHz */
{
coef_88to8,
@@ -2977,6 +3002,7 @@ static s32 *coef_addr_table[TEGRA210_SFC_NUM_RATES][TEGRA210_SFC_NUM_RATES] = {
coef_88to32,
coef_88to44,
coef_88to48,
+ UNSUPP_CONV,
BYPASS_CONV,
coef_88to96,
coef_88to176,
@@ -2991,6 +3017,7 @@ static s32 *coef_addr_table[TEGRA210_SFC_NUM_RATES][TEGRA210_SFC_NUM_RATES] = {
coef_96to32,
coef_96to44,
coef_96to48,
+ UNSUPP_CONV,
coef_96to88,
BYPASS_CONV,
coef_96to176,
@@ -3006,6 +3033,7 @@ static s32 *coef_addr_table[TEGRA210_SFC_NUM_RATES][TEGRA210_SFC_NUM_RATES] = {
coef_176to32,
coef_176to44,
coef_176to48,
+ UNSUPP_CONV,
coef_176to88,
coef_176to96,
BYPASS_CONV,
@@ -3021,6 +3049,7 @@ static s32 *coef_addr_table[TEGRA210_SFC_NUM_RATES][TEGRA210_SFC_NUM_RATES] = {
coef_192to32,
coef_192to44,
coef_192to48,
+ UNSUPP_CONV,
coef_192to88,
coef_192to96,
coef_192to176,
diff --git a/sound/soc/tegra/tegra210_sfc.h b/sound/soc/tegra/tegra210_sfc.h
index 5a6b66e..a4c993d7 100644
--- a/sound/soc/tegra/tegra210_sfc.h
+++ b/sound/soc/tegra/tegra210_sfc.h
@@ -2,7 +2,7 @@
/*
* tegra210_sfc.h - Definitions for Tegra210 SFC driver
*
- * Copyright (c) 2021 NVIDIA CORPORATION. All rights reserved.
+ * Copyright (c) 2021-2023 NVIDIA CORPORATION. All rights reserved.
*
*/
@@ -47,7 +47,7 @@
#define TEGRA210_SFC_EN_SHIFT 0
#define TEGRA210_SFC_EN (1 << TEGRA210_SFC_EN_SHIFT)
-#define TEGRA210_SFC_NUM_RATES 12
+#define TEGRA210_SFC_NUM_RATES 13
/* Fields in TEGRA210_SFC_COEF_RAM */
#define TEGRA210_SFC_COEF_RAM_EN BIT(0)
--
2.7.4
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