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Date:   Thu, 22 Jun 2023 13:59:09 +0200
From:   Konrad Dybcio <konrad.dybcio@...aro.org>
To:     Andy Gross <agross@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Jeffrey Hugo <quic_jhugo@...cinc.com>,
        Taniya Das <tdas@...eaurora.org>
Cc:     Marijn Suijten <marijn.suijten@...ainline.org>,
        linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 6/9] clk: qcom: gcc-msm8998: Don't check halt bit on some
 branch clks

On 22.06.2023 13:57, Konrad Dybcio wrote:
> Some branch clocks are governed externally and we're only supposed to
> send a request concerning their shutdown, not actually ensure it happens.
> 
> Use the BRANCH_HALT_SKIP define to skip checking the halt bit.
> 
> Signed-off-by: Konrad Dybcio <konrad.dybcio@...aro.org>
> ---
Whoops. Again, right after hitting send, I noticed this one was already
sent with 

https://lore.kernel.org/linux-arm-msm/20230531-topic-8998_mmssclk-v1-0-2b5a8fc90991@linaro.org/
>  drivers/clk/qcom/gcc-msm8998.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/clk/qcom/gcc-msm8998.c b/drivers/clk/qcom/gcc-msm8998.c
> index cccb19cae481..ef410f52f09f 100644
> --- a/drivers/clk/qcom/gcc-msm8998.c
> +++ b/drivers/clk/qcom/gcc-msm8998.c
> @@ -2112,7 +2112,7 @@ static struct clk_branch gcc_gp3_clk = {
>  
>  static struct clk_branch gcc_bimc_gfx_clk = {
>  	.halt_reg = 0x46040,
> -	.halt_check = BRANCH_HALT,
> +	.halt_check = BRANCH_HALT_SKIP,
>  	.clkr = {
>  		.enable_reg = 0x46040,
>  		.enable_mask = BIT(0),
> @@ -2125,7 +2125,7 @@ static struct clk_branch gcc_bimc_gfx_clk = {
>  
>  static struct clk_branch gcc_gpu_bimc_gfx_clk = {
>  	.halt_reg = 0x71010,
> -	.halt_check = BRANCH_HALT,
> +	.halt_check = BRANCH_HALT_SKIP,
>  	.clkr = {
>  		.enable_reg = 0x71010,
>  		.enable_mask = BIT(0),
> @@ -2151,7 +2151,7 @@ static struct clk_branch gcc_gpu_bimc_gfx_src_clk = {
>  
>  static struct clk_branch gcc_gpu_cfg_ahb_clk = {
>  	.halt_reg = 0x71004,
> -	.halt_check = BRANCH_HALT,
> +	.halt_check = BRANCH_HALT_SKIP,
>  	.clkr = {
>  		.enable_reg = 0x71004,
>  		.enable_mask = BIT(0),
> 

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