[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20230623180026.GA181743@bhelgaas>
Date: Fri, 23 Jun 2023 13:00:26 -0500
From: Bjorn Helgaas <helgaas@...nel.org>
To: Sricharan Ramabadhran <quic_srichara@...cinc.com>
Cc: agross@...nel.org, andersson@...nel.org, konrad.dybcio@...aro.org,
robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
conor+dt@...nel.org, sboyd@...nel.org, mturquette@...libre.com,
mani@...nel.org, lpieralisi@...nel.org, bhelgaas@...gle.com,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org,
linux-pci@...r.kernel.org
Subject: Re: [PATCH 1/4] pcie: qcom: Fix the macro
PARF_SLV_ADDR_SPACE_SIZE_2_3_3
On Fri, Jun 23, 2023 at 03:04:42PM +0530, Sricharan Ramabadhran wrote:
> PARF_SLV_ADDR_SPACE_SIZE_2_3_3 macro used for IPQ8074
> pcie slave addr size was initially set to 0x358, but
> was wrongly changed to 0x168 as a part of
> 'PCI: qcom: Sort and group registers and bitfield definitions'
> Fixing it back to right value here.
1) Make your subject line match the history. For example, you're
fixing 769e49d87b15 ("PCI: qcom: Sort and group registers ..."), so
your subject line should start with "PCI: qcom: ...".
2) It doesn't look like 769e49d87b15 changed
PARF_SLV_ADDR_SPACE_SIZE_2_3_3:
$ git show 769e49d87b15 | grep PARF_SLV_ADDR_SPACE_SIZE_2_3_3
+#define PARF_SLV_ADDR_SPACE_SIZE_2_3_3 0x16C /* Register offset specific to IP ver 2.3.3 */
-#define PARF_SLV_ADDR_SPACE_SIZE_2_3_3 0x16C /* Register offset specific to IP rev 2.3.3 */
What am I missing here? Do you have another out-of-tree patch that
broke this?
Bjorn
> Without this pcie bring up on IPQ8074 is broken now.
>
> Fixes: 769e49d87b15 ("PCI: qcom: Sort and group registers and bitfield definitions")
> Signed-off-by: Sricharan Ramabadhran <quic_srichara@...cinc.com>
> ---
> drivers/pci/controller/dwc/pcie-qcom.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
> index 4ab30892f6ef..59823beed13f 100644
> --- a/drivers/pci/controller/dwc/pcie-qcom.c
> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
> @@ -43,7 +43,7 @@
> #define PARF_PHY_REFCLK 0x4c
> #define PARF_CONFIG_BITS 0x50
> #define PARF_DBI_BASE_ADDR 0x168
> -#define PARF_SLV_ADDR_SPACE_SIZE_2_3_3 0x16c /* Register offset specific to IP ver 2.3.3 */
> +#define PARF_SLV_ADDR_SPACE_SIZE_2_3_3 0x358 /* Register offset specific to IP ver 2.3.3 */
> #define PARF_MHI_CLOCK_RESET_CTRL 0x174
> #define PARF_AXI_MSTR_WR_ADDR_HALT 0x178
> #define PARF_AXI_MSTR_WR_ADDR_HALT_V2 0x1a8
> --
> 2.34.1
>
Powered by blists - more mailing lists